Collaboration diagram for Defines and Macros:| #define | ADC_POWERUP_TIMEOUT 5000 | 
| Digital-To-Analog Converter and High Speed Comparator Special Function Register Set.  More... | |
| #define | ADC_CORE_MASK 0b0000000010001111 | 
| This define masks all cores of ADC.  More... | |
| #define | ADC_CORE0_MASK_INDEX 0b0000000000000001 | 
| This define masks core 0 of ADC.  More... | |
| #define | ADC_CORE1_MASK_INDEX 0b0000000000000010 | 
| This define masks core 1 of ADC.  More... | |
| #define | ADC_CORE2_MASK_INDEX 0b0000000000000100 | 
| This define masks core 2 of ADC.  More... | |
| #define | ADC_CORE3_MASK_INDEX 0b0000000000001000 | 
| This define masks core 3 of ADC.  More... | |
| #define | ADC_SHRCORE_MASK_INDEX 0b0000000010000000 | 
| This define masks shared core of ADC.  More... | |
| #define | REG_DACxCONL 0b0000000000000000 | 
| DACxCONL: DACx CONTROL REGISTER LOW.  More... | |
| #define | REG_DACxCONH 0b0000000000000000 | 
| DACxCONH: DACx CONTROL REGISTER LOW.  More... | |
| #define | REG_SLPxCONL 0b0000000000000000 | 
| SLPxCONL: DACx SLOPE CONTROL REGISTER LOW.  More... | |
| #define | REG_SLPxCONH 0b0000000000000000 | 
| SLPxCONH: DACx SLOPE CONTROL REGISTER LOW.  More... | |
| #define | REG_PCLKCON 0b0000000000000011 | 
| PCLKCON: PWM CLOCK CONTROL REGISTER.  More... | |
| #define | REG_CMBTRIGL 0b0000000000000000 | 
| CMBTRIGL: COMBINATIONAL TRIGGER REGISTER LOW.  More... | |
| #define | REG_CMBTRIGH 0b0000000000000000 | 
| CMBTRIGH: COMBINATIONAL TRIGGER REGISTER HIGH.  More... | |
| #define | REG_LOGCONA 0b0000000000000000 | 
| LOGCONA: COMBINATORIAL PWM LOGIC CONTROL REGISTER A.  More... | |
| #define | REG_LOGCONB 0b0000000000000000 | 
| LOGCONB: COMBINATORIAL PWM LOGIC CONTROL REGISTER B.  More... | |
| #define | REG_LOGCONC 0b0000000000000000 | 
| LOGCONC: COMBINATORIAL PWM LOGIC CONTROL REGISTER C.  More... | |
| #define | REG_LOGCOND 0b0000000000000000 | 
| LOGCOND: COMBINATORIAL PWM LOGIC CONTROL REGISTER D.  More... | |
| #define | REG_LOGCONE 0b0000000000000000 | 
| LOGCONE: COMBINATORIAL PWM LOGIC CONTROL REGISTER E.  More... | |
| #define | REG_LOGCONF 0b0000000000000000 | 
| LOGCONF: COMBINATORIAL PWM LOGIC CONTROL REGISTER F.  More... | |
| #define | REG_PWMEVTA 0b0000000000000000 | 
| PWMEVTA: PWM EVENT OUTPUT CONTROL REGISTER A.  More... | |
| #define | REG_PWMEVTB 0b0000000000000000 | 
| PWMEVTB: PWM EVENT OUTPUT CONTROL REGISTER B.  More... | |
| #define | REG_PWMEVTC 0b0000000000000000 | 
| PWMEVTC: PWM EVENT OUTPUT CONTROL REGISTER C.  More... | |
| #define | REG_PWMEVTD 0b0000000000000000 | 
| PWMEVTD: PWM EVENT OUTPUT CONTROL REGISTER D.  More... | |
| #define | REG_PWMEVTE 0b0000000000000000 | 
| PWMEVTE: PWM EVENT OUTPUT CONTROL REGISTER E.  More... | |
| #define | REG_PWMEVTF 0b0000000000000000 | 
| PWMEVTF: PWM EVENT OUTPUT CONTROL REGISTER F.  More... | |
| #define | P33C_PGxCONL_PWM_ON 0x8000 | 
| control bit in PGxCONL enabling/disabling the PWM generator  More... | |
| #define | P33C_PGxCONL_HRES_EN 0x0080 | 
| control bit in PGxCONL enabling/disabling High Resolution Mode  More... | |
| #define | P33C_PGxIOCONL_OVREN_SYNC 0x3000 | 
| control bits in PGxIOCONL enabling/disabling the PWM output override in synchronous mode  More... | |
| #define | P33C_PGxIOCONL_OVREN_ASYNC 0x2000 | 
| control bits in PGxIOCONL enabling/disabling the PWM output override in asynchronous mode  More... | |
| #define | P33C_PGxIOCONL_OVREN_ASYNC_SWAP 0x1000 | 
| #define | P33C_PGxIOCONH_PEN_SYNC 0x000C | 
| control bits in PGxIOCONH enabling/disabling the PWM outputs in synchronous mode  More... | |
| #define | P33C_PGxIOCONH_PEN_ASYNC 0x0008 | 
| #define | P33C_PGxIOCONH_PEN_ASYNC_SWAP 0x0004 | 
| #define | P33C_PGxSTAT_UPDREQ 0x0008 | 
| Control bit in PGxSTAT setting the Update Request bit.  More... | |
| #define | P33C_PGxCONH_MPERSEL 0x4000 | 
| Control bit in PGxCONH seting the PERIOD register source.  More... | |
| #define | P33C_PGxCONH_UPDMOD_MSTR 0b001 | 
| Master Immediate Update.  More... | |
| #define | P33C_PGxCONH_UPDMOD_SLV 0b011 | 
| Slaved immediate Update.  More... | |
| #define | REG_PGxCONL 0b0000000010001000 | 
| PGxCONL: PWM GENERATOR x CONTROL REGISTER LOW.  More... | |
| #define | REG_PGxCONH 0b0000000100000000 | 
| PGxCONH: PWM GENERATOR x CONTROL REGISTER LOW.  More... | |
| #define | REG_PGxIOCONL 0b0011000000000000 | 
| PGxIOCONL: PWM GENERATOR x I/O CONTROL REGISTER LOW.  More... | |
| #define | REG_PGxIOCONH 0b0000000000000000 | 
| PGxIOCONH: PWM GENERATOR x I/O CONTROL REGISTER LOW.  More... | |
| #define | REG_PGxEVTL 0b0000000100011001 | 
| PGxEVTL: PWM GENERATOR x EVENT REGISTER LOW.  More... | |
| #define | REG_PGxEVTH 0b0000000101000000 | 
| PGxEVTH: PWM GENERATOR x EVENT REGISTER LOW.  More... | |
| #define | REG_PGxCLPCIL 0b0000000000000000 | 
| PGxCLPCIL: PWM GENERATOR CURRENT LIMIT PCI REGISTER LOW.  More... | |
| #define | REG_PGxCLPCIH 0b0000000000000000 | 
| PGxCLPCIH: PWM GENERATOR CURRENT LIMIT PCI REGISTER HIGH.  More... | |
| #define | REG_PGxFPCIL 0b0000000000000000 | 
| PGxFPCIL: PWM GENERATOR FAULT PCI REGISTER LOW.  More... | |
| #define | REG_PGxFPCIH 0b0000000000000000 | 
| PGxFPCIH: PWM GENERATOR FAULT PCI REGISTER HIGH.  More... | |
| #define | REG_PGxFFPCIL 0b0000000000000000 | 
| PGxFFPCIL: PWM GENERATOR FEED FORWARD PCI REGISTER LOW.  More... | |
| #define | REG_PGxFFPCIH 0b0000000000000000 | 
| PGxFFPCIH: PWM GENERATOR FEED FORWARD PCI REGISTER LOW.  More... | |
| #define | REG_PGxSPCIL 0b0000000000000000 | 
| PGxSPCIL: PWM GENERATOR SOFTWARE PCI REGISTER LOW.  More... | |
| #define | REG_PGxSPCIH 0b0000000000000000 | 
| PGxSPCIH: PWM GENERATOR SOFTWARE PCI REGISTER LOW.  More... | |
| #define | REG_PGxLEBH 0b0000000000001000 | 
| PGxLEBH: PWM GENERATOR x LEADING-EDGE BLANKING REGISTER HIGH.  More... | |
| #define | REG_PGxLEBL 0b0000000000000000 | 
| PGxLEBL: PWM GENERATOR x LEADING-EDGE BLANKING REGISTER LOW.  More... | |
| #define | REG_PGxDCA 0b0000000000000000 | 
| PGxDCA: PWM GENERATOR x DUTY CYCLE ADJUSTMENT REGISTER.  More... | |
| #define ADC_CORE0_MASK_INDEX 0b0000000000000001 | 
This define masks core 0 of ADC.
Definition at line 65 of file dev_buck_ptemp_adc.h.
| #define ADC_CORE1_MASK_INDEX 0b0000000000000010 | 
This define masks core 1 of ADC.
Definition at line 71 of file dev_buck_ptemp_adc.h.
| #define ADC_CORE2_MASK_INDEX 0b0000000000000100 | 
This define masks core 2 of ADC.
Definition at line 77 of file dev_buck_ptemp_adc.h.
| #define ADC_CORE3_MASK_INDEX 0b0000000000001000 | 
This define masks core 3 of ADC.
Definition at line 83 of file dev_buck_ptemp_adc.h.
| #define ADC_CORE_MASK 0b0000000010001111 | 
This define masks all cores of ADC.
Definition at line 59 of file dev_buck_ptemp_adc.h.
| #define ADC_POWERUP_TIMEOUT 5000 | 
Digital-To-Analog Converter and High Speed Comparator Special Function Register Set.
Definition at line 51 of file dev_buck_ptemp_adc.h.
| #define ADC_SHRCORE_MASK_INDEX 0b0000000010000000 | 
This define masks shared core of ADC.
Definition at line 89 of file dev_buck_ptemp_adc.h.
| #define P33C_PGxCONH_MPERSEL 0x4000 | 
Control bit in PGxCONH seting the PERIOD register source.
Definition at line 476 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxCONH_UPDMOD_MSTR 0b001 | 
Master Immediate Update.
Definition at line 481 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxCONH_UPDMOD_SLV 0b011 | 
Slaved immediate Update.
Definition at line 486 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxCONL_HRES_EN 0x0080 | 
control bit in PGxCONL enabling/disabling High Resolution Mode
Definition at line 444 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxCONL_PWM_ON 0x8000 | 
control bit in PGxCONL enabling/disabling the PWM generator
Definition at line 439 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxIOCONH_PEN_ASYNC 0x0008 | 
Definition at line 465 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxIOCONH_PEN_ASYNC_SWAP 0x0004 | 
Definition at line 466 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxIOCONH_PEN_SYNC 0x000C | 
control bits in PGxIOCONH enabling/disabling the PWM outputs in synchronous mode
control bits in PGxIOCONH enabling/disabling the PWM outputs in asynchronous mode
| #define P33C_PGxIOCONL_OVREN_ASYNC 0x2000 | 
control bits in PGxIOCONL enabling/disabling the PWM output override in asynchronous mode
Definition at line 454 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxIOCONL_OVREN_ASYNC_SWAP 0x1000 | 
Definition at line 455 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxIOCONL_OVREN_SYNC 0x3000 | 
control bits in PGxIOCONL enabling/disabling the PWM output override in synchronous mode
Definition at line 449 of file dev_buck_ptemp_pwm.h.
| #define P33C_PGxSTAT_UPDREQ 0x0008 | 
Control bit in PGxSTAT setting the Update Request bit.
Definition at line 471 of file dev_buck_ptemp_pwm.h.
| #define REG_CMBTRIGH 0b0000000000000000 | 
CMBTRIGH: COMBINATIONAL TRIGGER REGISTER HIGH.
Definition at line 130 of file dev_buck_ptemp_pwm.h.
| #define REG_CMBTRIGL 0b0000000000000000 | 
CMBTRIGL: COMBINATIONAL TRIGGER REGISTER LOW.
Definition at line 105 of file dev_buck_ptemp_pwm.h.
| #define REG_DACxCONH 0b0000000000000000 | 
DACxCONH: DACx CONTROL REGISTER LOW.
Definition at line 98 of file dev_buck_ptemp_dac.h.
| #define REG_DACxCONL 0b0000000000000000 | 
DACxCONL: DACx CONTROL REGISTER LOW.
Definition at line 72 of file dev_buck_ptemp_dac.h.
| #define REG_LOGCONA 0b0000000000000000 | 
LOGCONA: COMBINATORIAL PWM LOGIC CONTROL REGISTER A.
Definition at line 155 of file dev_buck_ptemp_pwm.h.
| #define REG_LOGCONB 0b0000000000000000 | 
LOGCONB: COMBINATORIAL PWM LOGIC CONTROL REGISTER B.
Definition at line 180 of file dev_buck_ptemp_pwm.h.
| #define REG_LOGCONC 0b0000000000000000 | 
LOGCONC: COMBINATORIAL PWM LOGIC CONTROL REGISTER C.
Definition at line 205 of file dev_buck_ptemp_pwm.h.
| #define REG_LOGCOND 0b0000000000000000 | 
LOGCOND: COMBINATORIAL PWM LOGIC CONTROL REGISTER D.
Definition at line 230 of file dev_buck_ptemp_pwm.h.
| #define REG_LOGCONE 0b0000000000000000 | 
LOGCONE: COMBINATORIAL PWM LOGIC CONTROL REGISTER E.
Definition at line 255 of file dev_buck_ptemp_pwm.h.
| #define REG_LOGCONF 0b0000000000000000 | 
LOGCONF: COMBINATORIAL PWM LOGIC CONTROL REGISTER F.
Definition at line 280 of file dev_buck_ptemp_pwm.h.
| #define REG_PCLKCON 0b0000000000000011 | 
PCLKCON: PWM CLOCK CONTROL REGISTER.
Definition at line 80 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxCLPCIH 0b0000000000000000 | 
PGxCLPCIH: PWM GENERATOR CURRENT LIMIT PCI REGISTER HIGH.
Definition at line 691 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxCLPCIL 0b0000000000000000 | 
PGxCLPCIL: PWM GENERATOR CURRENT LIMIT PCI REGISTER LOW.
Definition at line 665 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxCONH 0b0000000100000000 | 
PGxCONH: PWM GENERATOR x CONTROL REGISTER LOW.
Definition at line 539 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxCONL 0b0000000010001000 | 
PGxCONL: PWM GENERATOR x CONTROL REGISTER LOW.
Definition at line 514 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxDCA 0b0000000000000000 | 
PGxDCA: PWM GENERATOR x DUTY CYCLE ADJUSTMENT REGISTER.
Definition at line 916 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxEVTH 0b0000000101000000 | 
PGxEVTH: PWM GENERATOR x EVENT REGISTER LOW.
Definition at line 639 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxEVTL 0b0000000100011001 | 
PGxEVTL: PWM GENERATOR x EVENT REGISTER LOW.
Definition at line 614 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxFFPCIH 0b0000000000000000 | 
PGxFFPCIH: PWM GENERATOR FEED FORWARD PCI REGISTER LOW.
Definition at line 791 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxFFPCIL 0b0000000000000000 | 
PGxFFPCIL: PWM GENERATOR FEED FORWARD PCI REGISTER LOW.
Definition at line 766 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxFPCIH 0b0000000000000000 | 
PGxFPCIH: PWM GENERATOR FAULT PCI REGISTER HIGH.
Definition at line 741 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxFPCIL 0b0000000000000000 | 
PGxFPCIL: PWM GENERATOR FAULT PCI REGISTER LOW.
Definition at line 716 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxIOCONH 0b0000000000000000 | 
PGxIOCONH: PWM GENERATOR x I/O CONTROL REGISTER LOW.
Definition at line 589 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxIOCONL 0b0011000000000000 | 
PGxIOCONL: PWM GENERATOR x I/O CONTROL REGISTER LOW.
Definition at line 564 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxLEBH 0b0000000000001000 | 
PGxLEBH: PWM GENERATOR x LEADING-EDGE BLANKING REGISTER HIGH.
Definition at line 866 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxLEBL 0b0000000000000000 | 
PGxLEBL: PWM GENERATOR x LEADING-EDGE BLANKING REGISTER LOW.
Definition at line 891 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxSPCIH 0b0000000000000000 | 
PGxSPCIH: PWM GENERATOR SOFTWARE PCI REGISTER LOW.
Definition at line 841 of file dev_buck_ptemp_pwm.h.
| #define REG_PGxSPCIL 0b0000000000000000 | 
PGxSPCIL: PWM GENERATOR SOFTWARE PCI REGISTER LOW.
Definition at line 816 of file dev_buck_ptemp_pwm.h.
| #define REG_PWMEVTA 0b0000000000000000 | 
PWMEVTA: PWM EVENT OUTPUT CONTROL REGISTER A.
Definition at line 305 of file dev_buck_ptemp_pwm.h.
| #define REG_PWMEVTB 0b0000000000000000 | 
PWMEVTB: PWM EVENT OUTPUT CONTROL REGISTER B.
Definition at line 330 of file dev_buck_ptemp_pwm.h.
| #define REG_PWMEVTC 0b0000000000000000 | 
PWMEVTC: PWM EVENT OUTPUT CONTROL REGISTER C.
Definition at line 355 of file dev_buck_ptemp_pwm.h.
| #define REG_PWMEVTD 0b0000000000000000 | 
PWMEVTD: PWM EVENT OUTPUT CONTROL REGISTER D.
Definition at line 380 of file dev_buck_ptemp_pwm.h.
| #define REG_PWMEVTE 0b0000000000000000 | 
PWMEVTE: PWM EVENT OUTPUT CONTROL REGISTER E.
Definition at line 405 of file dev_buck_ptemp_pwm.h.
| #define REG_PWMEVTF 0b0000000000000000 | 
PWMEVTF: PWM EVENT OUTPUT CONTROL REGISTER F.
Definition at line 430 of file dev_buck_ptemp_pwm.h.
| #define REG_SLPxCONH 0b0000000000000000 | 
SLPxCONH: DACx SLOPE CONTROL REGISTER LOW.
Definition at line 153 of file dev_buck_ptemp_dac.h.
| #define REG_SLPxCONL 0b0000000000000000 | 
SLPxCONL: DACx SLOPE CONTROL REGISTER LOW.
Definition at line 127 of file dev_buck_ptemp_dac.h.