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Digital Power Starter Kit 3 Firmware
dsPIC33C Buck Converter Voltage Mode Control Example
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Digital Power Starter Kit 3 Firmware
dsPIC33C Buck Converter Voltage Mode Control Example
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defining the CPU interrupt for primary and secondary vectors More...
#include <fault_handler/drivers/drv_trap_handler.h>
Inheritance diagram for CPU_INTTREG_s: Collaboration diagram for CPU_INTTREG_s:Additional Inherited Members | |
| Data Fields inherited from TRAP_LOGGER_s | |
| volatile struct TRAPLOG_STATUS_s | status |
| Status word of the Trap Logger object. More... | |
| volatile uint16_t | reset_count |
| Counter of CPU RESET events (read/write) More... | |
| enum TRAP_ID_e | trap_id |
| Trap-ID of the captured incident. More... | |
| volatile uint16_t | trap_count |
| Counter tracking the number of occurrences. More... | |
| volatile struct TRAP_FLAGS_s | trap_flags |
| Complete list of trap flags (showing all trap flags) More... | |
| volatile struct CPU_RCON_s | rcon_reg |
| Captures the RESET CONTROL register. More... | |
| volatile struct CPU_INTTREG_s | inttreg |
| Interrupt Vector and Priority register capture. More... | |
| volatile struct TASK_INFO_s | task_capture |
| Information of last task executed. More... | |
defining the CPU interrupt for primary and secondary vectors
Definition at line 169 of file drv_trap_handler.h.
| volatile unsigned ILR |
Bit #8-11: New Interrupt Priority Level.
Definition at line 174 of file drv_trap_handler.h.
| volatile unsigned |
Bit #12: Reserved.
Bit #15: Reserved.
Bit #14: Reserved.
Definition at line 175 of file drv_trap_handler.h.
| volatile uint16_t value |
Definition at line 181 of file drv_trap_handler.h.
| volatile unsigned VECNUM |
Bit #0-7: Pending Interrupt Number List.
Definition at line 173 of file drv_trap_handler.h.
| volatile unsigned VHOLD |
Bit #13: Vector Number Capture Enable bit.
Definition at line 176 of file drv_trap_handler.h.