Device analog output pin, register and interrupt vector assignments of output voltage feedback signal(s) of the buck converter. More...

Collaboration diagram for Buck Converter:

#define	BUCK_VOUT_ANSEL _ANSELC1
	ADC input assignments of output voltage feedback signals. More...

#define	BUCK_VOUT_ADCCORE 8
	0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core More...

#define	BUCK_VOUT_ADCIN 13
	Analog input number (e.g. '5' for 'AN5') More...

#define	BUCK_VOUT_ADCBUF ADCBUF13
	ADC input buffer of this ADC channel. More...

#define	BUCK_VOUT_ADCTRIG PG1TRIGA
	Register used for trigger placement. More...

#define	BUCK_VOUT_TRGSRC BUCK_PWM_TRGSRC_TRG1
	PWM1 (=PG1) Trigger 1 via PGxTRIGA. More...

Detailed Description

Device analog output pin, register and interrupt vector assignments of output voltage feedback signal(s) of the buck converter.

Macro Definition Documentation

◆ BUCK_VOUT_ADCBUF

#define BUCK_VOUT_ADCBUF ADCBUF13

ADC input buffer of this ADC channel.

Definition at line 511 of file dpsk3_hwdescr.h.

◆ BUCK_VOUT_ADCCORE

#define BUCK_VOUT_ADCCORE 8

0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core

Definition at line 509 of file dpsk3_hwdescr.h.

◆ BUCK_VOUT_ADCIN

#define BUCK_VOUT_ADCIN 13

Analog input number (e.g. '5' for 'AN5')

Definition at line 510 of file dpsk3_hwdescr.h.

◆ BUCK_VOUT_ADCTRIG

#define BUCK_VOUT_ADCTRIG PG1TRIGA

Register used for trigger placement.

Definition at line 512 of file dpsk3_hwdescr.h.

◆ BUCK_VOUT_ANSEL

#define BUCK_VOUT_ANSEL _ANSELC1

ADC input assignments of output voltage feedback signals.

In this section the ADC input channels, related ADC result buffers, trigger sources and interrupt vectors are defined. These settings allow the fast re-assignments of feedback signals in case of hardware changes. GPIO analog function mode enable bit

Definition at line 508 of file dpsk3_hwdescr.h.

◆ BUCK_VOUT_TRGSRC

#define BUCK_VOUT_TRGSRC BUCK_PWM_TRGSRC_TRG1

PWM1 (=PG1) Trigger 1 via PGxTRIGA.

Definition at line 513 of file dpsk3_hwdescr.h.