Digital Power Starter Kit 3 Firmware
dsPIC33C Buck Converter Voltage Mode Control Example

Device analog input pin, register and interrupt vector assignments of input voltage feedback signal(s) of the buck converter. More...

+ Collaboration diagram for Buck Converter:
#define _BUCK_VIN_ADCInterrupt   _ADCAN12Interrupt
 ADC input assignments of input voltage feedback signals. More...
 
#define _BUCK_VIN_ADCISR_IF   _ADCAN12IF
 ADC interrupt flag bit of the input voltage feedback channel. More...
 
#define BUCK_VIN_ANSEL   _ANSELC0
 GPIO analog function mode enable bit. More...
 
#define BUCK_VIN_ADCCORE   8
 0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core More...
 
#define BUCK_VIN_ADCIN   12
 Analog input number (e.g. '5' for 'AN5') More...
 
#define BUCK_VIN_ADCBUF   ADCBUF12
 ADC input buffer of this ADC channel. More...
 
#define BUCK_VIN_ADCTRIG   PG1TRIGB
 Register used for trigger placement. More...
 
#define BUCK_VIN_TRGSRC   BUCK_PWM_TRGSRC_TRG2
 PWM1 (=PG1) Trigger 2 via PGxTRIGB. More...
 

Detailed Description

Device analog input pin, register and interrupt vector assignments of input voltage feedback signal(s) of the buck converter.

Macro Definition Documentation

◆ _BUCK_VIN_ADCInterrupt

#define _BUCK_VIN_ADCInterrupt   _ADCAN12Interrupt

ADC input assignments of input voltage feedback signals.

In this section the ADC input channels, related ADC result buffers, trigger sources and interrupt vectors are defined. These settings allow the fast re-assignments of feedback signals in case of hardware changes. ADC interrupt service routine function call of the input voltage feedback channel

Definition at line 423 of file dpsk3_hwdescr.h.

◆ _BUCK_VIN_ADCISR_IF

#define _BUCK_VIN_ADCISR_IF   _ADCAN12IF

ADC interrupt flag bit of the input voltage feedback channel.

Definition at line 424 of file dpsk3_hwdescr.h.

◆ BUCK_VIN_ADCBUF

#define BUCK_VIN_ADCBUF   ADCBUF12

ADC input buffer of this ADC channel.

Definition at line 429 of file dpsk3_hwdescr.h.

◆ BUCK_VIN_ADCCORE

#define BUCK_VIN_ADCCORE   8

0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core

Definition at line 427 of file dpsk3_hwdescr.h.

◆ BUCK_VIN_ADCIN

#define BUCK_VIN_ADCIN   12

Analog input number (e.g. '5' for 'AN5')

Definition at line 428 of file dpsk3_hwdescr.h.

◆ BUCK_VIN_ADCTRIG

#define BUCK_VIN_ADCTRIG   PG1TRIGB

Register used for trigger placement.

Definition at line 430 of file dpsk3_hwdescr.h.

◆ BUCK_VIN_ANSEL

#define BUCK_VIN_ANSEL   _ANSELC0

GPIO analog function mode enable bit.

Definition at line 426 of file dpsk3_hwdescr.h.

◆ BUCK_VIN_TRGSRC

#define BUCK_VIN_TRGSRC   BUCK_PWM_TRGSRC_TRG2

PWM1 (=PG1) Trigger 2 via PGxTRIGB.

Definition at line 431 of file dpsk3_hwdescr.h.