Digital Power Starter Kit 3 Firmware  DM330017-3, Rev.3.0
dsPIC33C Buck Converter Peak Current Mode Control Example

PWM parameter definitions of the buck converter using physical quantities. More...

+ Collaboration diagram for Buck Converter:
#define BUCK_NO_OF_PHASES   1U
 User-declaration of global defines for PWM signal generator settings. More...
 
#define BUCK_SWITCHING_FREQUENCY   (float)500.0e+3
 Fixed Switching frequency in [Hz]. More...
 
#define BUCK_PWM_DUTY_CYCLE_MIN   (float) 0.010
 Minimum on/off-time ratio (duty ratio) in [%]. More...
 
#define BUCK_PWM_DUTY_CYCLE_MAX   (float) 0.900
 Maximum on/off-time ratio (duty ratio) in [%]. More...
 
#define BUCK_LEADING_EDGE_BLANKING   (float)120.0e-9
 Leading Edge Blanking period in [sec]. More...
 
#define BUCK_DEAD_TIME_LEADING_EDGE   (float) 20.0e-9
 Leading Edge Dead Time delay in [sec]. More...
 
#define BUCK_DEAD_TIME_FALLING_EDGE   (float) 60.0e-9
 Falling Edge Dead Time delay in [sec]. More...
 

Detailed Description

PWM parameter definitions of the buck converter using physical quantities.

Macro Definition Documentation

◆ BUCK_DEAD_TIME_FALLING_EDGE

#define BUCK_DEAD_TIME_FALLING_EDGE   (float) 60.0e-9

Falling Edge Dead Time delay in [sec].

Definition at line 325 of file dpsk3_hwdescr.h.

◆ BUCK_DEAD_TIME_LEADING_EDGE

#define BUCK_DEAD_TIME_LEADING_EDGE   (float) 20.0e-9

Leading Edge Dead Time delay in [sec].

Definition at line 324 of file dpsk3_hwdescr.h.

◆ BUCK_LEADING_EDGE_BLANKING

#define BUCK_LEADING_EDGE_BLANKING   (float)120.0e-9

Leading Edge Blanking period in [sec].

Definition at line 323 of file dpsk3_hwdescr.h.

◆ BUCK_NO_OF_PHASES

#define BUCK_NO_OF_PHASES   1U

User-declaration of global defines for PWM signal generator settings.

This section defines fundamental PWM settings required for the on-board buck converter of DPSK3. These settings are determined by hardware and defined using physical quantities. Pre-compiler macros are used to convert physical values into binary (integer) numbers to be written to Special Function Registers (SFR). Number of power converter phases of this design

Definition at line 318 of file dpsk3_hwdescr.h.

◆ BUCK_PWM_DUTY_CYCLE_MAX

#define BUCK_PWM_DUTY_CYCLE_MAX   (float) 0.900

Maximum on/off-time ratio (duty ratio) in [%].

Definition at line 322 of file dpsk3_hwdescr.h.

◆ BUCK_PWM_DUTY_CYCLE_MIN

#define BUCK_PWM_DUTY_CYCLE_MIN   (float) 0.010

Minimum on/off-time ratio (duty ratio) in [%].

Definition at line 321 of file dpsk3_hwdescr.h.

◆ BUCK_SWITCHING_FREQUENCY

#define BUCK_SWITCHING_FREQUENCY   (float)500.0e+3

Fixed Switching frequency in [Hz].

Definition at line 320 of file dpsk3_hwdescr.h.