Device analog output pin, register and interrupt vector assignments of phase current feedback signal(s) of the boost converter. More...

Collaboration diagram for Boost Converter:

#define	_BOOST_ISNS_ADCInterrupt _ADCAN1Interrupt
	ADC input assignments of phase current feedback signals. More...

#define	_BOOST_ISNS_ADCISR_IF _ADCAN1IF
	Interrupt Service Routine Flag Bit. More...

#define	BOOST_ISNS_ANSEL _ANSELA1
	GPIO analog function mode enable bit. More...

#define	BOOST_ISNS_ADCCORE 1
	0=Dedicated Core #0, 1=Dedicated Core #1, 2=Shared ADC Core More...

#define	BOOST_ISNS_ADCIN 1
	Analog input number (e.g. '5' for 'AN5') More...

#define	BOOST_ISNS_ALT_IN_SELECT 0b00
	Alternative Analog Input Selection (dedicated ADC cores only)) More...

#define	BOOST_ISNS_ADCBUF ADCBUF1
	ADC input buffer of this ADC channel. More...

#define	BOOST_ISNS_ADCTRIG PG2TRIGB
	Register used for trigger placement. More...

#define	BOOST_ISNS_TRGSRC BOOST_PWM_TRGSRC_TRG2
	PWM2 (=PG2) Trigger 2 via PGxTRIGB. More...

#define	BOOST_ISNS_OPA_INSTANCE 2U
	Operational amplifier instance used as ISNS aplifier (0 = disables op-amp option)) More...

Detailed Description

Device analog output pin, register and interrupt vector assignments of phase current feedback signal(s) of the boost converter.

Macro Definition Documentation

◆ _BOOST_ISNS_ADCInterrupt

#define _BOOST_ISNS_ADCInterrupt _ADCAN1Interrupt

ADC input assignments of phase current feedback signals.

In this section the ADC input channels, related ADC result buffers, trigger sources and interrupt vectors are defined. These settings allow the fast re-assignments of feedback signals in case of hardware changes.Interrupt Service Routine function name

Definition at line 1262 of file dpsk3_hwdescr.h.

◆ _BOOST_ISNS_ADCISR_IF

#define _BOOST_ISNS_ADCISR_IF _ADCAN1IF

Interrupt Service Routine Flag Bit.

Definition at line 1263 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_ADCBUF

#define BOOST_ISNS_ADCBUF ADCBUF1

ADC input buffer of this ADC channel.

Definition at line 1269 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_ADCCORE

#define BOOST_ISNS_ADCCORE 1

0=Dedicated Core #0, 1=Dedicated Core #1, 2=Shared ADC Core

Definition at line 1266 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_ADCIN

#define BOOST_ISNS_ADCIN 1

Analog input number (e.g. '5' for 'AN5')

Definition at line 1267 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_ADCTRIG

#define BOOST_ISNS_ADCTRIG PG2TRIGB

Register used for trigger placement.

Definition at line 1270 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_ALT_IN_SELECT

#define BOOST_ISNS_ALT_IN_SELECT 0b00

Alternative Analog Input Selection (dedicated ADC cores only))

Definition at line 1268 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_ANSEL

#define BOOST_ISNS_ANSEL _ANSELA1

GPIO analog function mode enable bit.

Definition at line 1265 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_OPA_INSTANCE

#define BOOST_ISNS_OPA_INSTANCE 2U

Operational amplifier instance used as ISNS aplifier (0 = disables op-amp option))

Definition at line 1273 of file dpsk3_hwdescr.h.

◆ BOOST_ISNS_TRGSRC

#define BOOST_ISNS_TRGSRC BOOST_PWM_TRGSRC_TRG2

PWM2 (=PG2) Trigger 2 via PGxTRIGB.

Definition at line 1271 of file dpsk3_hwdescr.h.