PWM peripheral output pins, control signals and register assignments used to drive the boost converter. More...
#define | BOOST_PWM_CHANNEL 2U |
PWM peripheral output pins, control signals and register assignments of converter phase #1. More... | |
#define | BOOST_PWM_GPIO_INSTANCE 1U |
Number indicating device port, where 0=Port RA, 0=Port RB, 0=Port RC, etc. More... | |
#define | BOOST_PWM_GPIO_PORT_PINH 13U |
Port Pin Number. More... | |
#define | BOOST_PWM_GPIO_PORT_PINL 12U |
Port Pin Number. More... | |
#define | BOOST_PWM_OUTPUT_SWAP true |
true = PWMxH is the leading PWM output, false = PWMxL is the leading PWM output More... | |
#define | BOOST_PWM_PDC PG2DC |
PWM Instance Duty Cycle Register. More... | |
#define | BOOST_PWMH_TRIS _TRISB12 |
Device Port TRIS register. More... | |
#define | BOOST_PWMH_WR _LATB12 |
Device Pin WRITE. More... | |
#define | BOOST_PWMH_RD _RB12 |
Device Pin READ. More... | |
#define | BOOST_PWMH_RPx (uint8_t)44 |
Device Pin output remappable pin number (RPx) More... | |
#define | BOOST_PWML_TRIS _TRISB13 |
Device Port TRIS register. More... | |
#define | BOOST_PWML_WR _LATB13 |
Device Pin WRITE. More... | |
#define | BOOST_PWML_RD _RB13 |
Device Pin READ. More... | |
#define | BOOST_PWML_RPx (uint8_t)45 |
Device Pin output remappable pin number (RPx) More... | |
#define | _BOOST_PWM_Interrupt _PWM2Interrupt |
PWM Interrupt Service Routine label. More... | |
#define | BOOST_PWM_IF _PWM2IF |
PWM Interrupt Flag Bit. More... | |
#define | BOOST_PWM_IE _PWM2IE |
PWM Interrupt Enable Bit. More... | |
#define | BOOST_PWM_IP _PWM2IP |
PWM Interrupt Priority. More... | |
#define | BOOST_PWM_TRGSRC_TRG1 0b00110 |
PWM Trigger #1 Trigger Source of this channel. More... | |
#define | BOOST_PWM_TRGSRC_TRG2 0b00111 |
PWM Trigger #2 Trigger Source of this channel. More... | |
#define | BOOST_PWM_PGxTRIGA PG2TRIGA |
PWM trigger register A. More... | |
#define | BOOST_PWM_PGxTRIGB PG2TRIGB |
PWM trigger register B. More... | |
#define | BOOST_PWM_PGxTRIGC PG2TRIGC |
PWM trigger register C. More... | |
#define | BOOST_PWM_ADTR1OFS 0U |
ADC Trigger 1 Offset: 0...31. More... | |
#define | BOOST_PWM_ADTR1PS 0U |
ADC Trigger 1 Postscaler: 0...31. More... | |
#define | BOOST_PWM_UPDREQ PG2STATbits.UPDREQ |
PWM peripheral output pins, control signals and register assignments used to drive the boost converter.
#define _BOOST_PWM_Interrupt _PWM2Interrupt |
PWM Interrupt Service Routine label.
Definition at line 953 of file dpsk3_hwdescr.h.
#define BOOST_PWM_ADTR1OFS 0U |
ADC Trigger 1 Offset: 0...31.
Definition at line 963 of file dpsk3_hwdescr.h.
#define BOOST_PWM_ADTR1PS 0U |
ADC Trigger 1 Postscaler: 0...31.
Definition at line 964 of file dpsk3_hwdescr.h.
#define BOOST_PWM_CHANNEL 2U |
PWM peripheral output pins, control signals and register assignments of converter phase #1.
Converter phase #1 uses a simple half-bridge to commutate the switch node. The signal source therefore only requires a single PWM generator instance to be configured in fixed frequency complementary mode with dead times. Additional PWM peripheral features are used by the firmware to respond to interrupts, trigger ADC conversions, control device output pins during startup and fault responses and to change timing settings on the fly.
Please review the device data sheet for details about register names and settings.PWM Instance Index (e.g. 1=PWM1, 2=PWM2, etc.)
Definition at line 937 of file dpsk3_hwdescr.h.
#define BOOST_PWM_GPIO_INSTANCE 1U |
Number indicating device port, where 0=Port RA, 0=Port RB, 0=Port RC, etc.
Definition at line 938 of file dpsk3_hwdescr.h.
#define BOOST_PWM_GPIO_PORT_PINH 13U |
Port Pin Number.
Definition at line 939 of file dpsk3_hwdescr.h.
#define BOOST_PWM_GPIO_PORT_PINL 12U |
Port Pin Number.
Definition at line 940 of file dpsk3_hwdescr.h.
#define BOOST_PWM_IE _PWM2IE |
PWM Interrupt Enable Bit.
Definition at line 955 of file dpsk3_hwdescr.h.
#define BOOST_PWM_IF _PWM2IF |
PWM Interrupt Flag Bit.
Definition at line 954 of file dpsk3_hwdescr.h.
#define BOOST_PWM_IP _PWM2IP |
PWM Interrupt Priority.
Definition at line 956 of file dpsk3_hwdescr.h.
#define BOOST_PWM_OUTPUT_SWAP true |
true = PWMxH is the leading PWM output, false = PWMxL is the leading PWM output
Definition at line 941 of file dpsk3_hwdescr.h.
#define BOOST_PWM_PDC PG2DC |
PWM Instance Duty Cycle Register.
Definition at line 943 of file dpsk3_hwdescr.h.
#define BOOST_PWM_PGxTRIGA PG2TRIGA |
PWM trigger register A.
Definition at line 959 of file dpsk3_hwdescr.h.
#define BOOST_PWM_PGxTRIGB PG2TRIGB |
PWM trigger register B.
Definition at line 960 of file dpsk3_hwdescr.h.
#define BOOST_PWM_PGxTRIGC PG2TRIGC |
PWM trigger register C.
Definition at line 961 of file dpsk3_hwdescr.h.
#define BOOST_PWM_TRGSRC_TRG1 0b00110 |
PWM Trigger #1 Trigger Source of this channel.
Definition at line 957 of file dpsk3_hwdescr.h.
#define BOOST_PWM_TRGSRC_TRG2 0b00111 |
PWM Trigger #2 Trigger Source of this channel.
Definition at line 958 of file dpsk3_hwdescr.h.
#define BOOST_PWM_UPDREQ PG2STATbits.UPDREQ |
Definition at line 966 of file dpsk3_hwdescr.h.
#define BOOST_PWMH_RD _RB12 |
Device Pin READ.
Definition at line 946 of file dpsk3_hwdescr.h.
#define BOOST_PWMH_RPx (uint8_t)44 |
Device Pin output remappable pin number (RPx)
Definition at line 947 of file dpsk3_hwdescr.h.
#define BOOST_PWMH_TRIS _TRISB12 |
Device Port TRIS register.
Definition at line 944 of file dpsk3_hwdescr.h.
#define BOOST_PWMH_WR _LATB12 |
Device Pin WRITE.
Definition at line 945 of file dpsk3_hwdescr.h.
#define BOOST_PWML_RD _RB13 |
Device Pin READ.
Definition at line 950 of file dpsk3_hwdescr.h.
#define BOOST_PWML_RPx (uint8_t)45 |
Device Pin output remappable pin number (RPx)
Definition at line 951 of file dpsk3_hwdescr.h.
#define BOOST_PWML_TRIS _TRISB13 |
Device Port TRIS register.
Definition at line 948 of file dpsk3_hwdescr.h.
#define BOOST_PWML_WR _LATB13 |
Device Pin WRITE.
Definition at line 949 of file dpsk3_hwdescr.h.