drv_mcc_extension_pwm.h

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#ifndef DRV_MCC_EXTENSION_PWM_H
#define DRV_MCC_EXTENSION_PWM_H
 
#include <xc.h>
#include <stdint.h> // include standard integer data types
#include <stdbool.h> // include standard boolean data types
#include <stddef.h> // include standard definition data types
 
// Identify the number of PWM in the device selected
#if defined (PG8CONL)
#define PWM_MAX_COUNT 8
#elif defined (PG4CONL)
#define PWM_MAX_COUNT 4
#else
#pragma message "selected device has no supported PWM generators"
#endif
 
 
enum PWM_PCI_ACCEPTANCE_CRITERIA_e
{
    PWM_PCI_ACCEPT_LEVEL_SENSITIVE = 0,
    PWM_PCI_ACCEPT_RISING_EDGE = 1,
    PWM_PCI_ACCEPT_ANY_EDGE = 2,
    PWM_PCI_ACCEPT_LATCHED = 3,
    PWM_PCI_ACCEPT_LATCHED_RISING_EDGE = 4,
    PWM_PCI_ACCEPT_LATCHED_ANY_EDGE = 5
};
 
typedef enum PWM_PCI_ACCEPTANCE_CRITERIA_e PWM_PCI_ACCEPTANCE_CRITERIA_t;
 
 
 
inline static void PWM_PCI_Fault_AcceptanceCriteria(uint16_t pwmIndex, 
        PWM_PCI_ACCEPTANCE_CRITERIA_t acpSetting)
{
   
    switch (pwmIndex)
    {
        case 1:
            PG1FPCIHbits.ACP = acpSetting;
            break;
        case 2:
            PG2FPCIHbits.ACP = acpSetting;
            break;  
        case 3:
            PG3FPCIHbits.ACP = acpSetting;
            break;          
        case 4:
            PG4FPCIHbits.ACP = acpSetting;
            break;    
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)
        case 5:
            PG5FPCIHbits.ACP = acpSetting;
            break;          
        case 6:
            PG6FPCIHbits.ACP = acpSetting;
            break;         
        case 7:
            PG7FPCIHbits.ACP = acpSetting;
            break;  
        case 8:
            PG8FPCIHbits.ACP = acpSetting;
            break;  
    #endif         
        default:
            break;      
    };
}
 
 
inline static void PWM_PCI_Fault_AcceptanceQualiferInvert(uint16_t pwmIndex, bool invert)
{
    switch (pwmIndex)
    {
        case 1:
            PG1FPCILbits.AQPS = (uint16_t)invert;
            break;
        case 2:
            PG2FPCILbits.AQPS = (uint16_t)invert;
            break;
        case 3:
            PG3FPCILbits.AQPS = (uint16_t)invert;
            break;
        case 4:
            PG4FPCILbits.AQPS = (uint16_t)invert;
            break;
    #if defined(PWM_MAX_COUNT) &&  (PWM_MAX_COUNT == 8)
        case 5:
            PG5FPCILbits.AQPS = (uint16_t)invert;
            break;
        case 6:
            PG6FPCILbits.AQPS = (uint16_t)invert;
            break;
        case 7:
            PG7FPCILbits.AQPS = (uint16_t)invert;
            break;
        case 8:
            PG8FPCILbits.AQPS = (uint16_t)invert;
            break;     
    #endif        
        default:
            break;
    };
}
 
 
inline static void PWM_PCI_Sync_AcceptanceCriteria(uint16_t pwmIndex, PWM_PCI_ACCEPTANCE_CRITERIA_t acpSetting)
{
    switch (pwmIndex)
    {
        case 1:
            PG1SPCIHbits.ACP = acpSetting;
            break;
        case 2:
            PG2SPCIHbits.ACP = acpSetting;
            break;  
        case 3:
            PG3SPCIHbits.ACP = acpSetting;
            break;          
        case 4:
            PG4SPCIHbits.ACP = acpSetting;
            break;    
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)        
        case 5:
            PG5SPCIHbits.ACP = acpSetting;
            break;    
        case 6:
            PG6SPCIHbits.ACP = acpSetting;
            break;         
        case 7:
            PG7SPCIHbits.ACP = acpSetting;
            break;  
        case 8:
            PG8SPCIHbits.ACP = acpSetting;
            break;  
    #endif        
        default:
            break;
            
    };
}
 
 
enum PWM_PCI_TERMTIME_AFTER_EVENT_e
{
    PWM_PCI_TERMTIME_AFTER_EVENT_AT_EOC = 0,
    PWM_PCI_TERMTIME_AFTER_EVENT_IMMEDIATE = 1
};
typedef enum PWM_PCI_TERMTIME_AFTER_EVENT_e PWM_PCI_TERMTIME_AFTER_EVENT_t;
 
 
inline static void PWM_PCI_Fault_TimetoTerminateAfterEvent(uint16_t pwmIndex, PWM_PCI_TERMTIME_AFTER_EVENT_t faultTerm)
{
    switch (pwmIndex)
    {
        case 1:
            PG1FPCILbits.TSYNCDIS = faultTerm;
            break;
        case 2:
            PG2FPCILbits.TSYNCDIS = faultTerm;
            break;  
        case 3:
            PG3FPCILbits.TSYNCDIS = faultTerm;
            break;          
        case 4:
            PG4FPCILbits.TSYNCDIS = faultTerm;
            break;    
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)    
        case 5:
            PG5FPCILbits.TSYNCDIS = faultTerm;
            break;    
        case 6:
            PG6FPCILbits.TSYNCDIS = faultTerm;
            break;         
        case 7:
            PG7FPCILbits.TSYNCDIS = faultTerm;
            break;  
        case 8:
            PG8FPCILbits.TSYNCDIS = faultTerm;
            break;  
    #endif        
        default:
            break;
            
    };
}
 
 
inline static void PWM_PCI_Sync_TimetoTerminateAfterEvent(uint16_t pwmIndex, PWM_PCI_TERMTIME_AFTER_EVENT_t faultTerm)
{
    switch (pwmIndex)
    {
        case 1:
            PG1SPCILbits.TSYNCDIS = faultTerm;
            break;
        case 2:
            PG2SPCILbits.TSYNCDIS = faultTerm;
            break;  
        case 3:
            PG3SPCILbits.TSYNCDIS = faultTerm;
            break;          
        case 4:
            PG4SPCILbits.TSYNCDIS = faultTerm;
            break;    
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)          
        case 5:
            PG5SPCILbits.TSYNCDIS = faultTerm;
            break;    
        case 6:
            PG6SPCILbits.TSYNCDIS = faultTerm;
            break;         
        case 7:
            PG7SPCILbits.TSYNCDIS = faultTerm;
            break;  
        case 8:
            PG8SPCILbits.TSYNCDIS = faultTerm;
            break;  
    #endif        
        default:
            break;
            
    };
}
 
 
enum PWM_SOCS_e
{
    PWM_SOCS_SELF_TRIGGER = 0,
    PWM_SOCS_PG1_OR_PG5 = 1,
    PWM_SOCS_PG2_OR_PG6 = 2,
    PWM_SOCS_PG3_OR_PG7 = 3,
    PWM_SOCS_PG4_OR_PG8 = 4,
    PWM_SOCS_TRIG_OR_PCI_SYNC = 15
};
typedef enum PWM_SOCS_e PWM_SOCS_t;
 
 
inline static void PWM_StartOfCycleTrigger(uint16_t pwmIndex, PWM_SOCS_t triggerSource)
{
    switch (pwmIndex)
    {
        case 1:
            PG1CONHbits.SOCS = triggerSource;
            break;
        case 2:
            PG2CONHbits.SOCS = triggerSource;
            break;
        case 3:
            PG3CONHbits.SOCS = triggerSource;
            break;
        case 4:
            PG4CONHbits.SOCS = triggerSource;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)          
        case 5:
            PG5CONHbits.SOCS = triggerSource;
            break;
        case 6:
            PG6CONHbits.SOCS = triggerSource;
            break;
        case 7:
            PG7CONHbits.SOCS = triggerSource;
            break;
        case 8:
            PG8CONHbits.SOCS = triggerSource;
            break;
    #endif        
        default:
            break;
    }
}       
 
 
inline static void PWM_UPDREQ_Broadcast_Enable(uint16_t pwmIndex, bool enable)
{
    uint16_t enable_ = (uint16_t)enable;
    PG1CONHbits.MSTEN = enable_;
    
    switch (pwmIndex)
    {
        case 1:
            PG1CONHbits.MSTEN = enable_;
            break;
        case 2:
            PG2CONHbits.MSTEN = enable_;
            break;
        case 3:
            PG3CONHbits.MSTEN = enable_;
            break;
        case 4:
            PG4CONHbits.MSTEN = enable_;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5CONHbits.MSTEN = enable_;
            break;
        case 6:
            PG6CONHbits.MSTEN = enable_;
            break;
        case 7:
            PG7CONHbits.MSTEN = enable_;
            break;
        case 8:
            PG8CONHbits.MSTEN = enable_;
            break;
    #endif        
        default:
            break;
    }
}
 
 
enum PWM_UPDMOD_e
{
    PWM_UPDMOD_SOC = 0,
    PWM_UPDMOD_IMMEDIATE = 1,
    PWM_UPDMOD_CLIENT_SOC = 2,
    PWM_UPDMOD_CLIENT_IMMEDIATE = 3
};
typedef enum PWM_UPDMOD_e PWM_UPDMOD_t;
 
 
inline static void PWM_Data_Update_Mode(uint16_t pwmIndex, PWM_UPDMOD_t updateMode)
{
    switch (pwmIndex)
    {
        case 1:
            PG1CONHbits.UPDMOD = updateMode;
            break;
        case 2:
            PG2CONHbits.UPDMOD = updateMode;
            break;
        case 3:
            PG3CONHbits.UPDMOD = updateMode;
            break;
        case 4:
            PG4CONHbits.UPDMOD = updateMode;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5CONHbits.UPDMOD = updateMode;
            break;
        case 6:
            PG6CONHbits.UPDMOD = updateMode;
            break;
        case 7:
            PG7CONHbits.UPDMOD = updateMode;
            break;
        case 8:
            PG8CONHbits.UPDMOD = updateMode;
            break;
    #endif        
        default:
            break;            
    }
}
 
 
enum PWM_PCI_SOURCE_e
{
    PWM_PCI_SOURCE_PWM1 = 0,
    PWM_PCI_SOURCE_PWM2 = 1,
    PWM_PCI_SOURCE_PWM3 = 2,
    PWM_PCI_SOURCE_PWM4 = 3,
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8) 
    PWM_PCI_SOURCE_PWM5 = 4,
    PWM_PCI_SOURCE_PWM6 = 5,
    PWM_PCI_SOURCE_PWM7 = 6,
    PWM_PCI_SOURCE_PWM8 = 7    
    #endif
};
typedef enum PWM_PCI_SOURCE_e PWM_PCI_SOURCE_t;
 
 
inline static void PWM_PCI_Source1(uint16_t pwmIndex, PWM_PCI_SOURCE_t pciSource)
{
    switch (pwmIndex)
    {
        case 1:
            PG1LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;
        case 2:
            PG2LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;
        case 3:
            PG3LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;
        case 4:
            PG4LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8) 
        case 5:
            PG5LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;
        case 6:
            PG6LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;
        case 7:
            PG7LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;
        case 8:
            PG8LEBHbits.PWMPCI = (uint16_t)pciSource;
            break;      
    #endif        
        default:
            break;
    }
}
 
 
enum RPnR_SOURCE_e
{
    RPnR_SOURCE_DefaultPORT = 0, 
    RPnR_SOURCE_U1TX        = 1, 
    RPnR_SOURCE_U1RTS       = 2, 
    RPnR_SOURCE_U2TX        = 3, 
    RPnR_SOURCE_U2RTS       = 4, 
    RPnR_SOURCE_SDO1        = 5, 
    RPnR_SOURCE_SCK1        = 6, 
    RPnR_SOURCE_SS1         = 7, 
    RPnR_SOURCE_SDO2        = 8, 
    RPnR_SOURCE_SCK2        = 9, 
    RPnR_SOURCE_SS2         = 10, 
    RPnR_SOURCE_SDO3        = 11, 
    RPnR_SOURCE_SCK3        = 12, 
    RPnR_SOURCE_SS3         = 13, 
    RPnR_SOURCE_REFCLKO     = 14, 
    RPnR_SOURCE_OCM1        = 15, 
    RPnR_SOURCE_OCM2        = 16, 
    RPnR_SOURCE_OCM3        = 17, 
    RPnR_SOURCE_OCM4        = 18, 
    RPnR_SOURCE_OCM5        = 19, 
    RPnR_SOURCE_OCM6        = 20, 
    RPnR_SOURCE_CAN1TX      = 21, 
    RPnR_SOURCE_CMP1        = 23, 
    RPnR_SOURCE_CMP2        = 24, 
    RPnR_SOURCE_CMP3        = 25, 
    RPnR_SOURCE_U3TX        = 27, 
    RPnR_SOURCE_U3RTS       = 28, 
    RPnR_SOURCE_PWM4H       = 34, 
    RPnR_SOURCE_PWM4L       = 35, 
    RPnR_SOURCE_PWMEA       = 36, 
    RPnR_SOURCE_PWMEB       = 37, 
    RPnR_SOURCE_QEICMP1     = 38, 
    RPnR_SOURCE_QEICMP2     = 39, 
    RPnR_SOURCE_CLC1OUT     = 40, 
    RPnR_SOURCE_CLC2OUT     = 41, 
    RPnR_SOURCE_OCM7        = 42, 
    RPnR_SOURCE_OCM8        = 43, 
    RPnR_SOURCE_PWMEC       = 44, 
    RPnR_SOURCE_PWMED       = 45, 
    RPnR_SOURCE_PTGTRG24    = 46, 
    RPnR_SOURCE_PTGTRG25    = 47, 
    RPnR_SOURCE_SENT1OUT    = 48, 
    RPnR_SOURCE_SENT2OUT    = 49, 
    RPnR_SOURCE_MCCP9A      = 50, 
    RPnR_SOURCE_MCCP9B      = 51, 
    RPnR_SOURCE_MCCP9C      = 52, 
    RPnR_SOURCE_MCCP9D      = 53, 
    RPnR_SOURCE_MCCP9E      = 54, 
    RPnR_SOURCE_MCCP9F      = 55, 
    RPnR_SOURCE_CLC3OUT     = 59, 
    RPnR_SOURCE_CLC4OUT     = 60, 
    RPnR_SOURCE_U1DTR       = 61, 
    RPnR_SOURCE_U2DTR       = 62, 
    RPnR_SOURCE_U3DTR       = 63 
};
typedef enum RPnR_SOURCE_e RPnR_SOURCE_t;
 
 
 
enum RPnR_VIRTUAL_PIN_e
{
    RPnR_VIRTUAL_PIN_RP176 = 0,
    RPnR_VIRTUAL_PIN_RP177 = 1,
    RPnR_VIRTUAL_PIN_RP178 = 2,
    RPnR_VIRTUAL_PIN_RP179 = 3,
    RPnR_VIRTUAL_PIN_RP180 = 4,
    RPnR_VIRTUAL_PIN_RP181 = 5
};
typedef enum RPnR_VIRTUAL_PIN_e RPnR_VIRTUAL_PIN_t;
 
 
inline static void RPnR_VirtualPin_Source(RPnR_VIRTUAL_PIN_t virtualPin, RPnR_SOURCE_t peripheral)
{
    
    __builtin_write_RPCON(0x0000); // unlock PPS
    
    switch (virtualPin)
    {
        case RPnR_VIRTUAL_PIN_RP176:
            RPOR24bits.RP176R = peripheral;
            break;
           
        case RPnR_VIRTUAL_PIN_RP177:
            RPOR24bits.RP177R = peripheral;
            break;
        
        case RPnR_VIRTUAL_PIN_RP178:
            RPOR25bits.RP178R = peripheral;
            break;
            
        case RPnR_VIRTUAL_PIN_RP179:
            RPOR25bits.RP179R = peripheral;
            break;    
            
        case RPnR_VIRTUAL_PIN_RP180:
            RPOR26bits.RP180R = peripheral;
            break;    
 
        case RPnR_VIRTUAL_PIN_RP181:
            RPOR26bits.RP181R = peripheral;
            break;                   
        
        default:
            break;
    };
    
    __builtin_write_RPCON(0x0800); // lock PPS
}
 
 
enum RPx_INPUT_e
{
    RPx_INPUT_VSS                   = 0, 
    RPx_INPUT_CMP1                  = 1, 
    RPx_INPUT_CMP2                  = 2, 
    RPx_INPUT_CMP3                  = 3, 
    RPx_INPUT_PTG_TRIG_26           = 6, 
    RPx_INPUT_PTG_TRIG_27           = 7, 
    RPx_INPUT_PWM_EVENT_C           = 11, 
    RPx_INPUT_PWM_EVENT_D           = 12, 
    RPx_INPUT_PWM_EVENT_E           = 13, 
    RPx_INPUT_RP32                  = 32, 
    RPx_INPUT_RP33                  = 33, 
    RPx_INPUT_RP34                  = 34, 
    RPx_INPUT_RP35                  = 35, 
    RPx_INPUT_RP36                  = 36, 
    RPx_INPUT_RP37                  = 37, 
    RPx_INPUT_RP38                  = 38, 
    RPx_INPUT_RP39                  = 39, 
    RPx_INPUT_RP40                  = 40, 
    RPx_INPUT_RP41                  = 41, 
    RPx_INPUT_RP42                  = 42, 
    RPx_INPUT_RP43                  = 43, 
    RPx_INPUT_RP44                  = 44, 
    RPx_INPUT_RP45                  = 45, 
    RPx_INPUT_RP46                  = 46, 
    RPx_INPUT_RP47                  = 47, 
    RPx_INPUT_RP48                  = 48, 
    RPx_INPUT_RP49                  = 49, 
    RPx_INPUT_RP50                  = 50, 
    RPx_INPUT_RP51                  = 51, 
    RPx_INPUT_RP52                  = 52, 
    RPx_INPUT_RP53                  = 53, 
    RPx_INPUT_RP54                  = 54, 
    RPx_INPUT_RP55                  = 55, 
    RPx_INPUT_RP56                  = 56, 
    RPx_INPUT_RP57                  = 57, 
    RPx_INPUT_RP58                  = 58, 
    RPx_INPUT_RP59                  = 59, 
    RPx_INPUT_RP60                  = 60, 
    RPx_INPUT_RP61                  = 61, 
    RPx_INPUT_RP62                  = 62, 
    RPx_INPUT_RP63                  = 63, 
    RPx_INPUT_RP64                  = 64, 
    RPx_INPUT_RP65                  = 65, 
    RPx_INPUT_RP66                  = 66, 
    RPx_INPUT_RP67                  = 67, 
    RPx_INPUT_RP68                  = 68, 
    RPx_INPUT_RP69                  = 69, 
    RPx_INPUT_RP70                  = 70, 
    RPx_INPUT_RP71                  = 71, 
    RPx_INPUT_RP72                  = 72, 
    RPx_INPUT_RP73                  = 73, 
    RPx_INPUT_RP74                  = 74, 
    RPx_INPUT_RP75                  = 75, 
    RPx_INPUT_RP76                  = 76, 
    RPx_INPUT_RP77                  = 77, 
    RPx_INPUT_RP78                  = 78, 
    RPx_INPUT_RP79                  = 79, 
    RPx_INPUT_DAC3_pwm_req_on       = 164, 
    RPx_INPUT_DAC3_pwm_req_off      = 165, 
    RPx_INPUT_DAC2_pwm_req_on       = 166, 
    RPx_INPUT_DAC2_pwm_req_off      = 167, 
    RPx_INPUT_DAC1_pwm_req_on       = 168, 
    RPx_INPUT_DAC1_pwm_req_off      = 169, 
    RPx_INPUT_RP176                 = 176, 
    RPx_INPUT_RP177                 = 177, 
    RPx_INPUT_RP178                 = 178, 
    RPx_INPUT_RP179                 = 179, 
    RPx_INPUT_RP180                 = 180, 
    RPx_INPUT_RP181                 = 181  
};
typedef enum RPx_INPUT_e RPx_INPUT_t;
 
 
enum PWM_PCI_INPUT_e
{
    PWM_PCI_INPUT8 = 0,
    PWM_PCI_INPUT9 = 1,
    PWM_PCI_INPUT10 = 2,
    PWM_PCI_INPUT11 = 3
};
typedef enum PWM_PCI_INPUT_e PWM_PCI_INPUT_t;
 
 
inline static void PWM_PCI_INPUT_MaptoPin(PWM_PCI_INPUT_t pciIndex, RPx_INPUT_t pin)
{
    __builtin_write_RPCON(0x0000); // unlock PPS
    switch (pciIndex)
    {
        case PWM_PCI_INPUT8:
            RPINR12bits.PCI8R = pin;
            break;
            
        case PWM_PCI_INPUT9:
            RPINR12bits.PCI9R = pin;
            break;
 
        case PWM_PCI_INPUT10:
            RPINR13bits.PCI10R = pin;
            break;
 
        case PWM_PCI_INPUT11:
            RPINR13bits.PCI11R = pin;
            break;            
            
        default:
            break;            
    };
    __builtin_write_RPCON(0x0800); // lock PPS
}
 
 
enum PWM_PCI_SOURCE_SELECT_e
{
    PWM_PCI_SOURCE_SELECT_CLC1         = 31,
    // 30 is reserved           
    PWM_PCI_SOURCE_SELECT_CMP3         = 29,
    PWM_PCI_SOURCE_SELECT_CMP2         = 28,
    PWM_PCI_SOURCE_SELECT_CMP1         = 27,
    PWM_PCI_SOURCE_SELECT_PWM_EVENT_D  = 26,
    PWM_PCI_SOURCE_SELECT_PWM_EVENT_C  = 25,
    PWM_PCI_SOURCE_SELECT_PWM_EVENT_B  = 24,
    PWM_PCI_SOURCE_SELECT_PWM_EVENT_A  = 23,
    PWM_PCI_SOURCE_SELECT_PCI22        = 22,    
    PWM_PCI_SOURCE_SELECT_PCI21        = 21,    
    PWM_PCI_SOURCE_SELECT_PCI20        = 20,    
    PWM_PCI_SOURCE_SELECT_PCI19        = 19,    
    PWM_PCI_SOURCE_SELECT_PCI18R       = 18,    
    PWM_PCI_SOURCE_SELECT_PCI17R       = 17,    
    PWM_PCI_SOURCE_SELECT_PCI16R       = 16,    
    PWM_PCI_SOURCE_SELECT_PCI15R       = 15,    
    PWM_PCI_SOURCE_SELECT_PCI14R       = 14,    
    PWM_PCI_SOURCE_SELECT_PCI13R       = 13,    
    PWM_PCI_SOURCE_SELECT_PCI12R       = 12,    
    PWM_PCI_SOURCE_SELECT_PCI11R       = 11,    
    PWM_PCI_SOURCE_SELECT_PCI10R       = 10,    
    PWM_PCI_SOURCE_SELECT_PCI9R        = 9,     
    PWM_PCI_SOURCE_SELECT_PCI8R        = 8,
    // 7 is reserved,           
    // 6 is reserved,           
    // 5 is reserved,           
    // 4 is reserved,           
    PWM_PCI_SOURCE_SELECT_COMBO_TRIG_B = 3,
    PWM_PCI_SOURCE_SELECT_COMBO_TRIG_A = 2,
    PWM_PCI_SOURCE_SELECT_PWMPCI_MUX   = 1,
    PWM_PCI_SOURCE_SELECT_TIED_TO_0    = 0
};
 
typedef enum PWM_PCI_SOURCE_SELECT_e PWM_PCI_SOURCE_SELECT_t;
 
 
 
inline static void PWM_PCI_Sync_Source_Select(uint16_t pwmIndex, PWM_PCI_SOURCE_SELECT_t pciSource)
{
    switch (pwmIndex)
    {
        case 1:
            PG1SPCILbits.PSS = pciSource;
            break;
        case 2:
            PG2SPCILbits.PSS = pciSource;
            break;
        case 3:
            PG3SPCILbits.PSS = pciSource;
            break;
        case 4:
            PG4SPCILbits.PSS = pciSource;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8) 
        case 5:
            PG5SPCILbits.PSS = pciSource;
            break;
        case 6:
            PG6SPCILbits.PSS = pciSource;
            break;
        case 7:
            PG7SPCILbits.PSS = pciSource;
            break;      
        case 8:
            PG8SPCILbits.PSS = pciSource;
            break;  
    #endif        
        default:
            break;
    };
}
 
 
 
enum PWM_PCI_ACCEPTANCE_QUALIFER_e
{
    PWM_PCI_ACCEPTANCE_QUALIFER_NONE = 0, 
    PWM_PCI_ACCEPTANCE_QUALIFER_DUTY = 1, 
    PWM_PCI_ACCEPTANCE_QUALIFER_LEB = 2, 
    PWM_PCI_ACCEPTANCE_QUALIFER_PWM = 3, 
    PWM_PCI_ACCEPTANCE_QUALIFER_PCI_PWMPCI = 4, 
    PWM_PCI_ACCEPTANCE_QUALIFER_PCI_SOURCE8 = 5, 
    PWM_PCI_ACCEPTANCE_QUALIFER_PCI_SOURCE9 = 6, 
    PWM_PCI_ACCEPTANCE_QUALIFER_SWPCI = 7 
};
typedef enum PWM_PCI_ACCEPTANCE_QUALIFER_e PWM_PCI_ACCEPTANCE_QUALIFER_t;
 
 
 
inline static void PWM_PCI_Fault_AcceptanceQualifierSource(uint16_t pwmIndex, PWM_PCI_ACCEPTANCE_QUALIFER_t source)
{
    switch (pwmIndex)
    {
        case 1:
            PG1FPCILbits.AQSS = source;
            break;
        case 2:
            PG2FPCILbits.AQSS = source;
            break;
        case 3:
            PG3FPCILbits.AQSS = source;
            break;
        case 4:
            PG4FPCILbits.AQSS = source;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5FPCILbits.AQSS = source;
            break;
        case 6:
            PG6FPCILbits.AQSS = source;
            break;
        case 7:
            PG7FPCILbits.AQSS = source;
            break;
        case 8:
            PG8FPCILbits.AQSS = source;
            break;      
    #endif        
        default:
            break;
    };
}
 
 
enum PWM_TRIG_MODE_e
{
    PWM_TRIG_MODE_SINGLE = 0,
    PWM_TRIG_MODE_RETRIGGERABLE = 1
};
typedef enum PWM_TRIG_MODE_e PWM_TRIG_MODE_t;
 
 
inline static void PWM_Trigger_Mode(uint16_t pwmIndex, PWM_TRIG_MODE_t trigMode)
{
    switch (pwmIndex)
    {
        case 1:
            PG1CONHbits.TRGMOD = trigMode;
            break;
        case 2:
            PG2CONHbits.TRGMOD = trigMode;
            break;
        case 3:
            PG3CONHbits.TRGMOD = trigMode;
            break;
        case 4:
            PG4CONHbits.TRGMOD = trigMode;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5CONHbits.TRGMOD = trigMode;
            break;
        case 6:
            PG6CONHbits.TRGMOD = trigMode;
            break;
        case 7:
            PG7CONHbits.TRGMOD = trigMode;
            break;
        case 8:
            PG8CONHbits.TRGMOD = trigMode;
            break;   
    #endif        
        default:
            break;
    };
}
 
 
enum PWM_PCI_TERM_e
{
    PWM_PCI_TERM_MANUAL     = 0,    
    PWM_PCI_TERM_AUTO       = 1,    
    PWM_PCI_TERM_PGxTRIGA   = 2,    
    PWM_PCI_TERM_PGxTRIGB   = 3,    
    PWM_PCI_TERM_PGxTRIGC   = 4,    
    PWM_PCI_TERM_PCI_SOURCE1 = 5,   
    PWM_PCI_TERM_PCI_SOURCE8 = 6,   
    PWM_PCI_TERM_PCI_SOURCE9 = 7    
};
typedef enum PWM_PCI_TERM_e PWM_PCI_TERM_t;
 
 
inline static void PWM_PCI_Sync_TerminationEventSelect(uint16_t pwmIndex, PWM_PCI_TERM_t termEvent)
{
    switch (pwmIndex)
    {
        case 1:
            PG1SPCILbits.TERM = termEvent;
            break;
        case 2:
            PG2SPCILbits.TERM = termEvent;
            break;
        case 3:
            PG3SPCILbits.TERM = termEvent;
            break;
        case 4:
            PG4SPCILbits.TERM = termEvent;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5SPCILbits.TERM = termEvent;
            break;
        case 6:
            PG6SPCILbits.TERM = termEvent;
            break;
        case 7:
            PG7SPCILbits.TERM = termEvent;
            break;
        case 8:
            PG8SPCILbits.TERM = termEvent;
            break;       
    #endif        
        default:
            break;
    };
}
 
 
inline static void PWM_Swap_PWMxL_and_PWMxH(uint16_t pwmIndex, bool swapPWMH_PWML)
{
    switch (pwmIndex)
    {
        case 1:
            PG1IOCONLbits.SWAP = swapPWMH_PWML;
            break;
        case 2:
            PG2IOCONLbits.SWAP = swapPWMH_PWML;
            break;
        case 3:
            PG3IOCONLbits.SWAP = swapPWMH_PWML;
            break;
        case 4:
            PG4IOCONLbits.SWAP = swapPWMH_PWML;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5IOCONLbits.SWAP = swapPWMH_PWML;
            break;
        case 6:
            PG6IOCONLbits.SWAP = swapPWMH_PWML;
            break;
        case 7:
            PG7IOCONLbits.SWAP = swapPWMH_PWML;
            break;
        case 8:
            PG8IOCONLbits.SWAP = swapPWMH_PWML;
            break;     
    #endif        
        default:
            break;
    };
}
 
 
enum PWM_EVENT_SOURCE_e
{
    PWM_EVENT_SOURCE_PGTRGSEL = 0,
    PWM_EVENT_SOURCE_PWM_GEN_OUTPUT = 1,
    PWM_EVENT_SOURCE_PCI_SYNC_ACTIVE = 2,
    PWM_EVENT_SOURCE_PCI_FF_ACTIVE = 3,
    PWM_EVENT_SOURCE_PCI_FF_CL_ACTIVE = 4,
    PWM_EVENT_SOURCE_PCI_FAULT_ACTIVE = 5,
    PWM_EVENT_SOURCE_CAHALF = 6,
    PWM_EVENT_SOURCE_STEER = 7,
    PWM_EVENT_SOURCE_ADC_TRIG1 = 8,
    PWM_EVENT_SOURCE_ADC_TRIG2 = 9,
    PWM_EVENT_SOURCE_HR_ERROR_EVENT = 15
};
typedef enum PWM_EVENT_SOURCE_e PWM_EVENT_SOURCE_t;
 
 
inline static void PWM_EVENTA_Configure(  uint16_t pwmSource, 
                                          PWM_EVENT_SOURCE_t eventSource,
                                          bool invert,
                                          bool outputEnable,
                                          bool stretchDisable,
                                          bool outputSync)
{
    {        
        PWMEVTAbits.EVTAPGS = (pwmSource-1);
        PWMEVTAbits.EVTAOEN = outputEnable;
        PWMEVTAbits.EVTAPOL = invert;
        PWMEVTAbits.EVTASTRD = stretchDisable;
        PWMEVTAbits.EVTASYNC = outputSync;
        PWMEVTAbits.EVTASEL = eventSource;        
    };
}
 
 
enum PWM_UPDTRG_e
{
    PWM_UPDTRG_MANUAL = 0,      
    PWM_UPDTRG_PGxDC = 1,       
    PWM_UPDTRG_PGxPHASE = 2,    
    PWM_UPDTRG_PGxTRIGA = 3     
};
typedef enum PWM_UPDTRG_e PWM_UPDTRG_t;
 
 
inline static void PWM_Data_Update_Trigger(uint16_t pwmIndex, PWM_UPDTRG_t updateTrigger)
{
    switch (pwmIndex)
    {
        case 1:
            PG1EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;
        case 2:
            PG2EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;
        case 3:
            PG3EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;
        case 4:
            PG4EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;
        case 6:
            PG6EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;
        case 7:
            PG7EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;       
        case 8:
            PG8EVTLbits.UPDTRG = (uint16_t)updateTrigger;
            break;   
    #endif        
        default:
            break;
    }
}
 
 
enum PWM_LATCH_MODE_e
{
    PWM_SET_DOMINANT_MODE = 0,
    PWM_RESET_DOMINANT_MODE = 1
};
typedef enum PWM_LATCH_MODE_e PWM_LATCH_MODE_t;
 
 
inline static void PWM_Fault_LatchMode(uint16_t pwmIndex, PWM_LATCH_MODE_t latchMode)
{
    switch (pwmIndex)
    {
        case 1:
            PG1FPCIHbits.LATMOD = latchMode;
            break;
        case 2:
            PG2FPCIHbits.LATMOD = latchMode;
            break;
        case 3:
            PG3FPCIHbits.LATMOD = latchMode;
            break;
        case 4:
            PG4FPCIHbits.LATMOD = latchMode;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5FPCIHbits.LATMOD = latchMode;
            break;
        case 6:
            PG6FPCIHbits.LATMOD = latchMode;
            break;
        case 7:
            PG7FPCIHbits.LATMOD = latchMode;
            break;
        case 8:
            PG8FPCIHbits.LATMOD = latchMode;
            break;   
    #endif        
        default:
            break;
    };
}
 
 
enum PWM_FAULT_DATA_e
{
    PWM_FAULT_EVENT_PWMH = 0,
    PWM_FAULT_EVENT_PWML = 1
};
typedef enum PWM_FAULT_DATA_e PWM_FAULT_DATA_t;
 
 
inline static void PWM_Fault_DataMode(uint16_t pwmIndex, PWM_FAULT_DATA_t faultDataMode)
{
    switch (pwmIndex)
    {
        case 1:
            PG1IOCONLbits.FLTDAT = faultDataMode;
            break;
        case 2:
            PG2IOCONLbits.FLTDAT = faultDataMode;
            break;
        case 3:
            PG3IOCONLbits.FLTDAT = faultDataMode;
            break;
        case 4:
            PG4IOCONLbits.FLTDAT= faultDataMode;
            break;
    #if defined(PWM_MAX_COUNT) && (PWM_MAX_COUNT == 8)         
        case 5:
            PG5IOCONLbits.FLTDAT = faultDataMode;
            break;
        case 6:
            PG6IOCONLbits.FLTDAT = faultDataMode;
            break;
        case 7:
            PG7IOCONLbits.FLTDAT = faultDataMode;
            break;
        case 8:
            PG8IOCONLbits.FLTDAT = faultDataMode;
            break;   
    #endif        
        default:
            break;
    };
}
 
 
#define FAULT_ACTIVE (PG1STATbits.FLTACT)||\
                     (PG2STATbits.FLTACT)||\
                     (PG3STATbits.FLTACT)||\
                     (PG4STATbits.FLTACT)\
        
#endif  /* DRV_MCC_EXTENSION_PWM_H */