Bar Logo 3.8/7.6 kw Totem pole Demonstration Application (Part-No. (not specified))
 
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drv_dma.c
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1
11/*
12 (c) 2022 Microchip Technology Inc. and its subsidiaries. You may use this
13 software and any derivatives exclusively with Microchip products.
14
15 THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
16 EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED
17 WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
18 PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP PRODUCTS, COMBINATION
19 WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
20
21 IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
22 INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
23 WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
24 BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE
25 FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN
26 ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
27 THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
28
29 MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF THESE
30 TERMS.
31*/
32
37// from MCC
38#include <string.h>
39
40#include "system/pins.h"
41#include "secondary_core/sec_core_interface.h"
42
43// from elsewhere
44#include "driver/spi/drv_spi.h"
45#include "driver/can/drv_can.h"
47
48#include "dma/dma.h"
49#include "dma/dma_types.h"
50
52
53#include "../mcc_generated_files/cmp/cmp1.h"
54
55
56// local typedefs
58
60{
64
65 uint16_t vinAdcBuf1;
66 uint16_t vinAdcBuf2;
67 uint16_t vinAdcBuf3;
68
69 int16_t vacOpAmpBias;
70
71 uint16_t coreBuffers[10];
72
73 uint16_t* vinAdcRaw; // pointer to SPI data
74
76};
77
80
81
90void DRV_DMA_init(void)
91{
92 memset((void*) &selfDma, 0x00U, sizeof (selfDma));
93
94 // initialize, for each phase monitor object
95 // - pointer to ADC result
96 // - counter reset value for Vin average calculation
97 // - pointer to ADC reading of AC sense offset on isolated voltage acquisition board
98
100
101 // avgcalc_buffer: measure period over half cycle, assume nominal 50Hz, for counter reset is based on number of 10us ticks in 10ms
102 selfDma.phase1.avgcalc_buffer.counter_reset = (uint16_t) (FCALL_AC_MONITOR / 50.0 / 2.0);
104
105 selfDma.phase2.vin.ptr_adcbuf = (uint16_t *) (&selfDma.vinAdcBuf2);
106 selfDma.phase2.avgcalc_buffer.counter_reset = (uint16_t) (FCALL_AC_MONITOR / 50.0 / 2.0);
108
109 selfDma.phase3.vin.ptr_adcbuf = (uint16_t *) (&selfDma.vinAdcBuf3);
110 selfDma.phase3.avgcalc_buffer.counter_reset = (uint16_t) (FCALL_AC_MONITOR / 50.0 / 2.0);
112
113 // initialize pointer to raw ADC data, for this project it coming from DMA via SPI
114 // from this SPI data, we determine selfDma.vinAdcBuf1, selfDma.vinAdcBuf2 and selfDma.vinAdcBuf3
116
117 // initialize state so that first we read the measured value of AC sense offset
119
120}
121
122
134static void __attribute__((always_inline)) DMA_Channel_updateAdcBuffers(void)
135{
136 // update data received via SPI
137 selfDma.vinAdcBuf1 = selfDma.vinAdcRaw[0] & 0x0FFF;
138 selfDma.vinAdcBuf2 = ((selfDma.vinAdcRaw[0] & 0xF000) >> 12) + ((selfDma.vinAdcRaw[1] & 0x00FF) << 4);
139 selfDma.vinAdcBuf3 = ((selfDma.vinAdcRaw[1] & 0xFF00) >> 8) + ((selfDma.vinAdcRaw[2] & 0x000F) << 8);
140}
141
142
151static void __attribute__((always_inline)) DMA_Channel_doAcMonitor(void)
152{
153 // run the AC monitor state machines using the data received over SPI as input
157}
158
159
169static void __attribute__((always_inline)) DMA_Channel_updateCoreBuffers(uint16_t * coreBuffer)
170{
171
172 //<<<< only for Debug purpose---------------
173 DAC1DATH = selfDma.phase1.vin.raw;
174 //<<<< only for Debug purpose---------------
175 coreBuffer[0] = selfDma.phase1.vin.rectified;
176 coreBuffer[1] = selfDma.phase2.vin.rectified;
177 coreBuffer[2] = selfDma.phase3.vin.rectified;
178 coreBuffer[3] = selfDma.phase1.vin.vloop_ff;
179 coreBuffer[4] = selfDma.phase2.vin.vloop_ff;
180 coreBuffer[5] = selfDma.phase3.vin.vloop_ff;
181 coreBuffer[7] = selfDma.phase1.vin.avg;
182 coreBuffer[8] = selfDma.phase2.vin.avg;
183 coreBuffer[9] = selfDma.phase3.vin.avg;
184}
185
186
195static void __attribute__((always_inline)) DMA_Channel_resetAcMonitor(void)
196{
197 // set AC ok flags to zero so that secondary core will shut off PFC as soon as possible
204}
205
206
217static void __attribute__((always_inline)) DMA_Channel_updateStatusAndSendData(uint16_t * coreBuffer)
218{
219 // update status flags. The bit-fields are organized in such a way so they can be packed quickly
220 // into one 16-bit word for transmission via mailbox to secondary core
221 uint16_t phase1_status = selfDma.phase1.status.value & 0x001F;
222 uint16_t phase2_status = (selfDma.phase2.status.value & 0x001F) << 5;
223 uint16_t phase3_status = (selfDma.phase3.status.value & 0x001F) << 10;
224 coreBuffer[6] = phase1_status + phase2_status + phase3_status + HV_FLAG;
225
226 // send data to secondary core via mailbox B
228}
229
230
231
241void DRV_DMA_getVinAverage(uint16_t * vinAvg)
242{
243 vinAvg[0] = selfDma.phase1.vin.avg;
244 vinAvg[1] = selfDma.phase2.vin.avg;
245 vinAvg[2] = selfDma.phase3.vin.avg;
246}
247
248
258{
259 return selfDma.coreBuffers;
260}
261
262
287{
290 {
291 // SPI is connected
292 if (Drv_SPI_Checksum())
293 {
294 // SPI checksum test passes
296 switch(selfDma.state)
297 {
299 {
300 // wait for a valid reading of the op-amp offset before running AC monitor
301 // on isolated voltage acquisition board, the offset is only measured at startup
302 // so once we have a valid reading we exit this state
303 // a valid reading of the AC offset is one that is within +/- 5% of the expected value of 1.65V
304 int16_t opAmpBias = (int16_t) ((selfDma.vinAdcRaw[2] & 0xFFF0) >> 4); // unpack ADC reading from data received over SPI
305 DMA_ChannelEnable(0); // Enable DMA Channel, this needs to be done for correct operation
306 if ((opAmpBias < OPAMP_BIAS_HIGH_LIMIT) && (opAmpBias > OPAMP_BIAS_LOW_LIMIT))
307 {
308 selfDma.vacOpAmpBias = opAmpBias; // store reading
309 selfDma.state = STATE_ONLINE; // onto normal running state
310 }
311 }
312 break;
313
314 case STATE_ONLINE:
315 {
316 // this is the normal running state
317 // update ADC buffers with data received over SPI
319
320 // Enable DMA Channel, this needs to be done for correct operation
321 // doing it here means that the SPI/DMA peripherals are ready to
322 // receive new SPI data from the isolated voltage acquisition board
323 // while we are still processing the current data
325
326 // run AC monitor for each of the 3 phases
328
329 // update buffer used to send data across to sec. core via mailbox
331 }
332 break;
333
334 default:
336 break;
337 } // switch(selfDma.state)
338 }
339 else
340 {
341 // checksum test failed.
342 DMA_ChannelEnable(0); // Enable DMA Channel, this needs to be done for correct operation
343
344 // Reset AC monitor. In this case the secondary core should turn off PFC
345 // as the AC OK flags for each phase will be cleared
347 }
348 }
349 else
350 {
351 // SPI not connected
352 DMA_ChannelEnable(0); // Enable DMA Channel, this needs to be done for correct operation
353
354 // Reset AC monitor. In this case the secondary core should turn off PFC
355 // as the AC OK flags for each phase will be cleared
357 }
358
359 // update status flags and send data to sec. core via mailbox B
361}
This is the generated driver header file for the DMA driver.
This is the generated driver types header file for the DMA driver.
This is the generated driver header file for the SEC_CORE1 driver.
@ MSI1_ProtocolB
header of the CAN Driver
static void DMA_Channel_updateCoreBuffers(uint16_t *coreBuffer)
Definition drv_dma.c:169
void DRV_DMA_init(void)
Definition drv_dma.c:90
static void DMA_Channel_doAcMonitor(void)
Definition drv_dma.c:151
static void DMA_Channel_updateAdcBuffers(void)
Definition drv_dma.c:134
static DRV_DMA_DATA_t selfDma
Definition drv_dma.c:79
void DRV_DMA_getVinAverage(uint16_t *vinAvg)
Definition drv_dma.c:241
static void DMA_Channel_resetAcMonitor(void)
Definition drv_dma.c:195
static void DMA_Channel_updateStatusAndSendData(uint16_t *coreBuffer)
Definition drv_dma.c:217
DRV_DMA_STATES_t
Definition drv_dma.c:57
@ STATE_ONLINE
Definition drv_dma.c:57
@ STATE_WAIT_VALID_VIN_SENSE_OFFSET
Definition drv_dma.c:57
uint16_t * DRV_DMA_getCoreBuffer(void)
Definition drv_dma.c:257
bool Drv_SPI_get_Connected_Flag(void)
Definition drv_spi.c:102
void Drv_SPI_Reset_Timeout_Counter(uint16_t count)
Definition drv_spi.c:87
uint16_t * Drv_SPI_get_Adr_Data_Obj(void)
Definition drv_spi.c:131
bool Drv_SPI_Checksum(void)
Definition drv_spi.c:172
This is the driver source file for spi builds upon mcc.
#define SPI_TIMEOUT_IN_100us_TICKS
Definition drv_spi.h:44
void vacm_state_machine(struct VACM_s *vacm_obj)
void vacm_reset_phase_monitor_object(struct VACM_s *vacm_obj)
Definition vac_monitor.c:85
void vacm_reset_state_machine(struct VACM_s *vacm_obj)
header of the VAC
#define OPAMP_BIAS_HIGH_LIMIT
#define OPAMP_BIAS_LOW_LIMIT
DMA_CHANNEL
Defines the DMA channles that are selected from the MCC Melody User Interface for the DMA transfers....
Definition dma_types.h:51
void DMA_ChannelCallback(enum DMA_CHANNEL channel)
This is the default callback with weak attribute. The user can override and implement the default cal...
Definition drv_dma.c:286
static void DMA_ChannelEnable(enum DMA_CHANNEL channel)
This inline function enables the DMA channel.
Definition dma.h:142
bool SEC_CORE1_ProtocolWrite(enum SEC_CORE_PROTOCOLS protocolName, uint16_t *pData)
This routine writes data to mailbox.
Definition sec_core1.c:365
#define HV_FLAG
Used when sending status word from primary to secondary core.
#define FCALL_AC_MONITOR
frequency at which AC monitor code is executed (in Hertz)
Definition vac_monitor.h:84
VACM_t phase3
Definition drv_dma.c:63
uint16_t vinAdcBuf3
Definition drv_dma.c:67
DRV_DMA_STATES_t state
Definition drv_dma.c:75
uint16_t coreBuffers[10]
Definition drv_dma.c:71
VACM_t phase2
Definition drv_dma.c:62
uint16_t * vinAdcRaw
Definition drv_dma.c:73
uint16_t vinAdcBuf1
Definition drv_dma.c:65
int16_t vacOpAmpBias
Definition drv_dma.c:69
uint16_t vinAdcBuf2
Definition drv_dma.c:66
VACM_t phase1
Definition drv_dma.c:61
volatile uint16_t value
uint16_t vloop_ff
‍square of the average input voltage
int16_t * ptr_offset
‍rectified input voltage
uint16_t * ptr_adcbuf
Pointer to register or variable where the value is read from (e.g. ADCBUFx) or written to (e....
uint16_t avg
‍pointer to offset upon which sensed input voltage sits before it is digitized by the ADC
uint16_t rectified
‍previous reading of raw input voltage
uint16_t counter_reset
‍counter used for computing the average of the rectified input voltage
Main AC Monitor data object data type declaration.
VACM_STATUS_t status
AC monitor status flags.
VACM_AVGCALC_BUFFER_t avgcalc_buffer
used for store information needed at runtime for calculation of average of rectified input voltage
VACM_VIN_t vin
information related to input voltage