dma.h

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/*
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    Subject to your compliance with these terms, you may use Microchip 
    software and any derivatives exclusively with Microchip products. 
    You are responsible for complying with 3rd party license terms  
    applicable to your use of 3rd party software (including open source  
    software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? 
    NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS 
    SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,  
    MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 
    WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 
    INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY 
    KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF 
    MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE 
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    TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT 
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    THIS SOFTWARE.
*/
 
#ifndef DMA_H
#define DMA_H
 
// Section: Included Files
 
#include <xc.h>
#include <stdbool.h>
#include <stdint.h>
#include "dma_types.h"
#include "dma_interface.h"
       
// Section: Data Type Definitions
 
extern const struct DMA_INTERFACE DMA_SPI;
 
#define DMA_SPI_Initialize DMA_Initialize
#define DMA_SPI_Deinitialize DMA_Deinitialize
#define DMA_SPI_ChannelEnable DMA_ChannelEnable
#define DMA_SPI_TransferCountSet DMA_TransferCountSet
#define DMA_SPI_TransferCountGet DMA_TransferCountGet
#define DMA_SPI_SoftwareTriggerEnable DMA_SoftwareTriggerEnable
#define DMA_SPI_SourceAddressSet DMA_SourceAddressSet
#define DMA_SPI_DestinationAddressSet DMA_DestinationAddressSet
#define DMA_SPI_IsSoftwareRequestPending DMA_IsSoftwareRequestPending
#define DMA_SPI_ChannelTasks DMA_ChannelTasks
#define DMA_SPI_ChannelCallbackRegister DMA_ChannelCallbackRegister
 
// Section: Driver Interface Functions
 
void DMA_Initialize (void);
 
void DMA_Deinitialize(void);
    
inline static void DMA_ChannelEnable(enum DMA_CHANNEL channel)
{
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                DMACH0bits.CHEN = 1;
                break; 
        case DMA_CHANNEL_1:
                DMACH1bits.CHEN = 1;
                break; 
        case DMA_CHANNEL_2:
                DMACH2bits.CHEN = 1;
                break; 
        case DMA_CHANNEL_3:
                DMACH3bits.CHEN = 1;
                break; 
        case DMA_CHANNEL_4:
                DMACH4bits.CHEN = 1;
                break; 
        case DMA_CHANNEL_5:
                DMACH5bits.CHEN = 1;
                break; 
        default: break;
    }
}
 
inline static void DMA_ChannelDisable(enum DMA_CHANNEL channel)
{
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                DMACH0bits.CHEN = 0;
                break;    
        case DMA_CHANNEL_1:
                DMACH1bits.CHEN = 0;
                break;    
        case DMA_CHANNEL_2:
                DMACH2bits.CHEN = 0;
                break;    
        case DMA_CHANNEL_3:
                DMACH3bits.CHEN = 0;
                break;    
        case DMA_CHANNEL_4:
                DMACH4bits.CHEN = 0;
                break;    
        case DMA_CHANNEL_5:
                DMACH5bits.CHEN = 0;
                break;    
        default: break;
    }
}
 
inline static void DMA_TransferCountSet(enum DMA_CHANNEL channel, uint16_t transferCount)
{
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                DMACNT0 = transferCount;
                
                break;
        case DMA_CHANNEL_1:
                DMACNT1 = transferCount;
                
                break;
        case DMA_CHANNEL_2:
                DMACNT2 = transferCount;
                
                break;
        case DMA_CHANNEL_3:
                DMACNT3 = transferCount;
                
                break;
        case DMA_CHANNEL_4:
                DMACNT4 = transferCount;
                
                break;
        case DMA_CHANNEL_5:
                DMACNT5 = transferCount;
                
                break;
        default: break;
    }
}
 
inline static uint16_t DMA_TransferCountGet(enum DMA_CHANNEL channel)
{
    uint16_t transferCount = 0U;
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                transferCount = DMACNT0;
                break;
        case DMA_CHANNEL_1:
                transferCount = DMACNT1;
                break;
        case DMA_CHANNEL_2:
                transferCount = DMACNT2;
                break;
        case DMA_CHANNEL_3:
                transferCount = DMACNT3;
                break;
        case DMA_CHANNEL_4:
                transferCount = DMACNT4;
                break;
        case DMA_CHANNEL_5:
                transferCount = DMACNT5;
                break;
        default: 
                break;
    }
    return transferCount;
}
 
inline static void DMA_SoftwareTriggerEnable(enum DMA_CHANNEL channel)
{
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                DMACH0bits.CHREQ = 1;
                break;
        case DMA_CHANNEL_1:
                DMACH1bits.CHREQ = 1;
                break;
        case DMA_CHANNEL_2:
                DMACH2bits.CHREQ = 1;
                break;
        case DMA_CHANNEL_3:
                DMACH3bits.CHREQ = 1;
                break;
        case DMA_CHANNEL_4:
                DMACH4bits.CHREQ = 1;
                break;
        case DMA_CHANNEL_5:
                DMACH5bits.CHREQ = 1;
                break;
        default: break;
    }
}
 
inline static void DMA_SourceAddressSet(enum DMA_CHANNEL channel, uint16_t address) 
{
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                DMASRC0 = address;
                break;
        case DMA_CHANNEL_1:
                DMASRC1 = address;
                break;
        case DMA_CHANNEL_2:
                DMASRC2 = address;
                break;
        case DMA_CHANNEL_3:
                DMASRC3 = address;
                break;
        case DMA_CHANNEL_4:
                DMASRC4 = address;
                break;
        case DMA_CHANNEL_5:
                DMASRC5 = address;
                break;
        default: break;
    }    
}
 
inline static void DMA_DestinationAddressSet(enum DMA_CHANNEL channel, uint16_t address) 
{
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                DMADST0 = address;
                break;
        case DMA_CHANNEL_1:
                DMADST1 = address;
                break;
        case DMA_CHANNEL_2:
                DMADST2 = address;
                break;
        case DMA_CHANNEL_3:
                DMADST3 = address;
                break;
        case DMA_CHANNEL_4:
                DMADST4 = address;
                break;
        case DMA_CHANNEL_5:
                DMADST5 = address;
                break;
        default: break;
    }    
}
 
 
inline static bool DMA_IsSoftwareRequestPending(enum DMA_CHANNEL channel)
{
    bool status = 0;
    switch(channel) 
    {
        case DMA_CHANNEL_0:
                status = DMACH0bits.CHREQ;
                break;              
        case DMA_CHANNEL_1:
                status = DMACH1bits.CHREQ;
                break;              
        case DMA_CHANNEL_2:
                status = DMACH2bits.CHREQ;
                break;              
        case DMA_CHANNEL_3:
                status = DMACH3bits.CHREQ;
                break;              
        case DMA_CHANNEL_4:
                status = DMACH4bits.CHREQ;
                break;              
        case DMA_CHANNEL_5:
                status = DMACH5bits.CHREQ;
                break;              
        default: 
                break;
    }
    return status;
}
 
void DMA_ChannelTasks(void);
 
 
void DMA_ChannelCallbackRegister(void(*callback)(enum DMA_CHANNEL channel));
 
void DMA_ChannelCallback(enum DMA_CHANNEL channel);
    
#endif  // DMA_H