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dma.c
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1
17/*
18© [2023] Microchip Technology Inc. and its subsidiaries.
19
20 Subject to your compliance with these terms, you may use Microchip
21 software and any derivatives exclusively with Microchip products.
22 You are responsible for complying with 3rd party license terms
23 applicable to your use of 3rd party software (including open source
24 software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
25 NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
26 SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
27 MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
28 WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
29 INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
30 KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
31 MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
32 FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
33 TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
34 EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
35 THIS SOFTWARE.
36*/
37
38// Section: Included Files
39
40#include <stddef.h>
41#include "../dma.h"
42
43#include "driver/dma/drv_dma.h" //TODO: remove
44
45// Section: File specific functions
46
47static void (*DMA_ChannelHandler)(enum DMA_CHANNEL channel) = NULL;
48
49// Section: Driver Interface
50
51const struct DMA_INTERFACE DMA_SPI = {
53 .Deinitialize = &DMA_Deinitialize,
54 .ChannelEnable = &DMA_ChannelEnable,
55 .ChannelDisable = &DMA_ChannelDisable,
56 .TransferCountSet = &DMA_TransferCountSet,
57 .TransferCountGet = &DMA_TransferCountGet,
58 .SoftwareTriggerEnable = &DMA_SoftwareTriggerEnable,
59 .SourceAddressSet = &DMA_SourceAddressSet,
60 .DestinationAddressSet = &DMA_DestinationAddressSet,
61 .IsSoftwareRequestPending = &DMA_IsSoftwareRequestPending,
62 .ChannelCallbackRegister = &DMA_ChannelCallbackRegister,
63 .ChannelTasks = &DMA_ChannelTasks,
64};
65// Section: Driver Interface Function Definitions
66
67void DMA_Initialize (void)
68{
69
70 // DMAEN disabled; PRSSEL Fixed priority;
71 DMACON = (0x0 | 0x01) & 0x7FFF; //The module is disabled, till other settings are configured.
72 // LADDR 6144;
73 DMAL= 0x1800;
74 // HADDR 20479;
75 DMAH= 0x4FFF;
76
77 // CHEN0 disabled; DAMODE0 Incremented; TRMODE0 One-Shot; CHREQ0 disabled; RELOAD0 enabled; SIZE0 16 bit; NULLW0 disabled; SAMODE0 Unchanged;
78 DMACH0 = (uint16_t)0x210 & (uint16_t)0xFFFE; //The channel is disabled, till other settings are configured.
79 // HALFIF disabled; LOWIF disabled; HALFEN disabled; DONEIF disabled; OVRUNIF disabled; CHSEL0 Main SPI1 RX; HIGHIF disabled;
80 DMAINT0= 0x200;
81 // SADDR0 696;
82 DMASRC0= 0x2B8;
83 // DADDR0 0;
84 DMADST0= 0x0;
85 // CNT0 4;
86 DMACNT0= 0x4;
87 // Clearing Channel 0 Interrupt Flag;
88 IFS0bits.DMA0IF = 0;
89 // Enabling Channel 0 Interrupt
90 IEC0bits.DMA0IE = 1;
91
92 // CHEN1 disabled; SAMODE1 Unchanged; SIZE1 16 bit; DAMODE1 Unchanged; CHREQ1 disabled; RELOAD1 disabled; TRMODE1 One-Shot; NULLW1 disabled;
93 DMACH1 = (uint16_t)0x0 & (uint16_t)0xFFFE; //The channel is disabled, till other settings are configured.
94 // HALFIF disabled; LOWIF disabled; HALFEN disabled; DONEIF disabled; OVRUNIF disabled; HIGHIF disabled; CHSEL1 Main INT0;
95 DMAINT1= 0x0;
96 // SADDR1 0;
97 DMASRC1= 0x0;
98 // DADDR1 0;
99 DMADST1= 0x0;
100 // CNT1 0;
101 DMACNT1= 0x0;
102 // Clearing Channel 1 Interrupt Flag;
103 IFS0bits.DMA1IF = 0;
104
105 // SAMODE2 Unchanged; CHEN2 disabled; SIZE2 16 bit; DAMODE2 Unchanged; CHREQ2 disabled; RELOAD2 disabled; NULLW2 disabled; TRMODE2 One-Shot;
106 DMACH2 = (uint16_t)0x0 & (uint16_t)0xFFFE; //The channel is disabled, till other settings are configured.
107 // HALFIF disabled; LOWIF disabled; HALFEN disabled; DONEIF disabled; OVRUNIF disabled; HIGHIF disabled; CHSEL2 Main INT0;
108 DMAINT2= 0x0;
109 // SADDR2 0;
110 DMASRC2= 0x0;
111 // DADDR2 0;
112 DMADST2= 0x0;
113 // CNT2 0;
114 DMACNT2= 0x0;
115 // Clearing Channel 2 Interrupt Flag;
116 IFS1bits.DMA2IF = 0;
117
118 // SAMODE3 Unchanged; CHEN3 disabled; SIZE3 16 bit; DAMODE3 Unchanged; TRMODE3 One-Shot; NULLW3 disabled; CHREQ3 disabled; RELOAD3 disabled;
119 DMACH3 = (uint16_t)0x0 & (uint16_t)0xFFFE; //The channel is disabled, till other settings are configured.
120 // HALFIF disabled; LOWIF disabled; HALFEN disabled; DONEIF disabled; OVRUNIF disabled; CHSEL3 Main INT0; HIGHIF disabled;
121 DMAINT3= 0x0;
122 // SADDR3 0;
123 DMASRC3= 0x0;
124 // DADDR3 0;
125 DMADST3= 0x0;
126 // CNT3 0;
127 DMACNT3= 0x0;
128 // Clearing Channel 3 Interrupt Flag;
129 IFS1bits.DMA3IF = 0;
130
131 // CHEN4 disabled; DAMODE4 Unchanged; TRMODE4 One-Shot; CHREQ4 disabled; RELOAD4 disabled; SIZE4 16 bit; NULLW4 disabled; SAMODE4 Unchanged;
132 DMACH4 = (uint16_t)0x0 & (uint16_t)0xFFFE; //The channel is disabled, till other settings are configured.
133 // HALFIF disabled; LOWIF disabled; HALFEN disabled; DONEIF disabled; OVRUNIF disabled; HIGHIF disabled; CHSEL4 Main INT0;
134 DMAINT4= 0x0;
135 // SADDR4 0;
136 DMASRC4= 0x0;
137 // DADDR4 0;
138 DMADST4= 0x0;
139 // CNT4 0;
140 DMACNT4= 0x0;
141 // Clearing Channel 4 Interrupt Flag;
142 IFS1bits.DMA4IF = 0;
143
144 // SIZE5 16 bit; DAMODE5 Unchanged; CHEN5 disabled; SAMODE5 Unchanged; CHREQ5 disabled; RELOAD5 disabled; TRMODE5 One-Shot; NULLW5 disabled;
145 DMACH5 = (uint16_t)0x0 & (uint16_t)0xFFFE; //The channel is disabled, till other settings are configured.
146 // CHSEL5 Main INT0; HALFIF disabled; LOWIF disabled; HALFEN disabled; DONEIF disabled; OVRUNIF disabled; HIGHIF disabled;
147 DMAINT5= 0x0;
148 // SADDR5 0;
149 DMASRC5= 0x0;
150 // DADDR5 0;
151 DMADST5= 0x0;
152 // CNT5 0;
153 DMACNT5= 0x0;
154 // Clearing Channel 5 Interrupt Flag;
155 IFS2bits.DMA5IF = 0;
156
158
159 //Enable DMA
160 DMACONbits.DMAEN = 1;
161}
162
164{
165 DMACONbits.DMAEN = 0;
166
167 DMACH0bits.CHEN = 0;
168 DMACH1bits.CHEN = 0;
169 DMACH2bits.CHEN = 0;
170 DMACH3bits.CHEN = 0;
171 DMACH4bits.CHEN = 0;
172 DMACH5bits.CHEN = 0;
173
174 DMACON= 0x0;
175 DMAL= 0x0;
176 DMAH= 0x0;
177
178 DMACH0 = 0x0;
179 DMAINT0 = 0x0;
180 DMASRC0 = 0x0;
181 DMADST0 = 0x0;
182 DMACNT0 = 0x1;
183 IFS0bits.DMA0IF = 0;
184 IEC0bits.DMA0IE = 0;
185 DMACH1 = 0x0;
186 DMAINT1 = 0x0;
187 DMASRC1 = 0x0;
188 DMADST1 = 0x0;
189 DMACNT1 = 0x1;
190 IFS0bits.DMA1IF = 0;
191 DMACH2 = 0x0;
192 DMAINT2 = 0x0;
193 DMASRC2 = 0x0;
194 DMADST2 = 0x0;
195 DMACNT2 = 0x1;
196 IFS1bits.DMA2IF = 0;
197 DMACH3 = 0x0;
198 DMAINT3 = 0x0;
199 DMASRC3 = 0x0;
200 DMADST3 = 0x0;
201 DMACNT3 = 0x1;
202 IFS1bits.DMA3IF = 0;
203 DMACH4 = 0x0;
204 DMAINT4 = 0x0;
205 DMASRC4 = 0x0;
206 DMADST4 = 0x0;
207 DMACNT4 = 0x1;
208 IFS1bits.DMA4IF = 0;
209 DMACH5 = 0x0;
210 DMAINT5 = 0x0;
211 DMASRC5 = 0x0;
212 DMADST5 = 0x0;
213 DMACNT5 = 0x1;
214 IFS2bits.DMA5IF = 0;
215
216}
217
218void DMA_ChannelCallbackRegister(void(*callback)(enum DMA_CHANNEL channel))
219{
220 if(NULL != callback)
221 {
222 DMA_ChannelHandler = callback;
223 }
224}
225
226void __attribute__ ((weak)) DMA_ChannelCallback (enum DMA_CHANNEL channel)
227{
228 (void)channel;
229}
230
231void __attribute__ ( ( interrupt, no_auto_psv ) ) _DMA0Interrupt( void )
232{
233 if(NULL != DMA_ChannelHandler)
234 {
235 (*DMA_ChannelHandler)(DMA_CHANNEL_0);
236 }
237
238 IFS0bits.DMA0IF = 0;
239}
240
242{
243 if(IFS0bits.DMA1IF == 1)
244 {
245 if(NULL != DMA_ChannelHandler)
246 {
247 (*DMA_ChannelHandler)(DMA_CHANNEL_1);
248 }
249
250 IFS0bits.DMA1IF = 0;
251 }
252 if(IFS1bits.DMA2IF == 1)
253 {
254 if(NULL != DMA_ChannelHandler)
255 {
256 (*DMA_ChannelHandler)(DMA_CHANNEL_2);
257 }
258
259 IFS1bits.DMA2IF = 0;
260 }
261 if(IFS1bits.DMA3IF == 1)
262 {
263 if(NULL != DMA_ChannelHandler)
264 {
265 (*DMA_ChannelHandler)(DMA_CHANNEL_3);
266 }
267
268 IFS1bits.DMA3IF = 0;
269 }
270 if(IFS1bits.DMA4IF == 1)
271 {
272 if(NULL != DMA_ChannelHandler)
273 {
274 (*DMA_ChannelHandler)(DMA_CHANNEL_4);
275 }
276
277 IFS1bits.DMA4IF = 0;
278 }
279 if(IFS2bits.DMA5IF == 1)
280 {
281 if(NULL != DMA_ChannelHandler)
282 {
283 (*DMA_ChannelHandler)(DMA_CHANNEL_5);
284 }
285
286 IFS2bits.DMA5IF = 0;
287 }
288}
This is the generated driver header file for the DMA driver.
@ DMA_CHANNEL_5
Definition dma_types.h:57
@ DMA_CHANNEL_0
Definition dma_types.h:52
@ DMA_CHANNEL_4
Definition dma_types.h:56
@ DMA_CHANNEL_1
Definition dma_types.h:53
@ DMA_CHANNEL_3
Definition dma_types.h:55
@ DMA_CHANNEL_2
Definition dma_types.h:54
void _DMA0Interrupt(void)
Definition dma.c:231
static void(* DMA_ChannelHandler)(enum DMA_CHANNEL channel)
Definition dma.c:47
This is the driver header file for DMA driver.
void DMA_Initialize(void)
Initializes the DMA module.
Definition dma.c:67
void DMA_ChannelTasks(void)
This function is used to implement the tasks for polled implementations of DMA Channel.
Definition dma.c:241
static void DMA_SourceAddressSet(enum DMA_CHANNEL channel, uint16_t address)
This inline function sets the source address to specified DMA channel.
Definition dma.h:318
DMA_CHANNEL
Defines the DMA channles that are selected from the MCC Melody User Interface for the DMA transfers....
Definition dma_types.h:51
static void DMA_TransferCountSet(enum DMA_CHANNEL channel, uint16_t transferCount)
This inline function sets the number of transfer counts to DMA channel.
Definition dma.h:209
void DMA_Deinitialize(void)
Deinitializes the DMA to POR values.
Definition dma.c:163
static bool DMA_IsSoftwareRequestPending(enum DMA_CHANNEL channel)
This inline function returns the status of the software request of the DMA channel.
Definition dma.h:387
static uint16_t DMA_TransferCountGet(enum DMA_CHANNEL channel)
This inline function returns the number of transfer counts from DMA channel.
Definition dma.h:248
void DMA_ChannelCallback(enum DMA_CHANNEL channel)
This is the default callback with weak attribute. The user can override and implement the default cal...
Definition dma.c:226
static void DMA_SoftwareTriggerEnable(enum DMA_CHANNEL channel)
This inline function sets the software trigger of the DMA channel.
Definition dma.h:284
const struct DMA_INTERFACE DMA_SPI
Structure object of type DMA_INTERFACE with the custom name given by the user in the Melody Driver Us...
Definition dma.c:51
static void DMA_ChannelDisable(enum DMA_CHANNEL channel)
This inline function disables the DMA channel.
Definition dma.h:175
void DMA_ChannelCallbackRegister(void(*callback)(enum DMA_CHANNEL channel))
This function can be used to override default callback and to define custom callback for DMA Channel ...
Definition dma.c:218
static void DMA_ChannelEnable(enum DMA_CHANNEL channel)
This inline function enables the DMA channel.
Definition dma.h:142
static void DMA_DestinationAddressSet(enum DMA_CHANNEL channel, uint16_t address)
This inline function sets the destination address to specified DMA channel.
Definition dma.h:352
Structure containing the function pointers of DMA driver.
void(* Initialize)(void)
Pointer to DMA_Initialize.