Digital Power Starter Kit 3 Firmware
dsPIC33C Boost Converter Voltage Mode Control Example
drv_trap_handler.h
1 /* **************************************************************************************************
2 * © 2021 Microchip Technology Inc.
3 *
4 * FileName: drv_TrapHandler.h
5 * Processor: dsPIC33C
6 * Compiler: MPLAB® XC15 v1.36 higher
7 *
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31 *
32 * REVISION HISTORY:
33 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
34 * Date Author Company Version Comments
35 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
36 *
37 * 03/09/2006 D. Settu MCHP 1.0 First Release
38 * 10/07/2009 Andreas Reiter HPC 1.1 added a header file and a default trap handler
39 * routine for better integration
40 * 07/19/2016 Andreas Reiter MCHP 1.2 Added data structure for trap monitoring
41 * 06/16/2018 Andreas Reiter MCHP 1.3 Added support for dsPIC33C and XC16 compiler changes in v1.30
42 * 10/27/2020 Andreas Reiter MCHP 1.4 Optimized data structure labels solving parsing issues
43 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
44 *
45 * ADDITIONAL NOTES:
46 *
47 * 1. This file contains trap service routines (handlers) for hardware exceptions generated by
48 * the dsPIC33F device.
49 *
50 * 2. All trap service routines in this file simply ensure that device continuously executes code
51 * within the trap service routine. Users may modify the basic framework provided here to suit
52 * to the needs of their application.
53 *
54 * **************************************************************************************************/
55 
56 #ifndef _GLOBAL_TRAPS_H_
57 #define _GLOBAL_TRAPS_H_
58 
59 // Device header file
60 #include <xc.h> // include processor files - each processor file is guarded.
61 #include <stdint.h> // include standard integer types header file
62 #include <stdbool.h> // include standard boolean types header file
63 
69 /**********************************************************************************
70  * @var TRAP_DMA_SUPPORT
71  * @brief defining trap-ID for primary and secondary vectors
72  *********************************************************************************/
73 #if ((__HAS_DMA__) || (__HAS_DMAV2__))
74  #define TRAP_DMA_SUPPORT 1
75 #else
76  #define TRAP_DMA_SUPPORT 0
77 #endif
78 
79 
80 #define FAULT_OBJECT_CPU_RESET_TRIGGER_BIT_MASK 0b0000000000000001
81 #define CPU_RESET_TRIGGER_LOW_BIT_MASK 0b00000000000000011011101110000000
82 
84 // =================================================================================================
85 //
86 // DEFINING TRAP-ID FOR PRIMARY AND SECONDARY EXCEPTION VECTORS
87 //
88 // =================================================================================================
89 
94 /**********************************************************************************
95  * @enum TRAP_ID_e
96  * @brief defining trap-ID for primary and secondary vectors
97  * @extends TRAP_LOGGER_s
98  *********************************************************************************/
99 typedef enum TRAP_ID_e
100 {
103  TRAP_STACK_ERROR = 0x0004,
104  TRAP_MATH_ERROR = 0x0008,
105  TRAP_DMA_ERROR = 0x0010,
106 
111 
117 
120 
121  TRAP_RESET_MSK = 0x7F1F
122 
123 } TRAP_ID_t;
124 
125 /**********************************************************************************
126  * @struct TRAP_FLAGS_s
127  * @brief Defines the Trap Flag for primary and secondary vectors
128  * @extends TRAP_LOGGER_s
129  *********************************************************************************/
130 typedef struct TRAP_FLAGS_s
131 {
132  union {
133  struct {
134 
135  volatile unsigned OVAERR :1;
136  volatile unsigned OVBERR :1;
137  volatile unsigned COVAERR :1;
138  volatile unsigned COVBERR :1;
139  volatile unsigned SFTACERR :1;
140  volatile unsigned DIV0ERR :1;
141  volatile unsigned MATHERR :1;
142  volatile unsigned ADDRERR :1;
143  volatile unsigned STKERR :1;
144  volatile unsigned OSCFAIL :1;
145  volatile unsigned SWTRAP :1;
146  volatile unsigned NAE :1;
147  volatile unsigned DOOVR :1;
148  volatile unsigned APLL :1;
149  volatile unsigned SGHT :1;
150  volatile unsigned DMACERR :1;
151 
152  volatile unsigned ECCDBE :1;
153  volatile unsigned CAN :1;
154  volatile unsigned CAN2 :1;
155  volatile unsigned :13;
156 
157  }__attribute__((packed))bits;
158 
159  volatile uint32_t value;
160  };
161 
162 }TRAP_FLAGS_t;
163 
164 /**********************************************************************************
165  * @struct CPU_INTTREG_s
166  * @brief defining the CPU interrupt for primary and secondary vectors
167  * @extends TRAP_LOGGER_s
168  *********************************************************************************/
169 typedef struct CPU_INTTREG_s
170 {
171  union {
172  struct {
173  volatile unsigned VECNUM:8;
174  volatile unsigned ILR :4;
175  volatile unsigned :1;
176  volatile unsigned VHOLD :1;
177  volatile unsigned :1;
178  volatile unsigned :1;
179  }__attribute__((packed))bits;
180 
181  volatile uint16_t value;
182  };
183 
184 } CPU_INTTREG_t;
185 
186 /**********************************************************************************
187  * @struct CPU_RCON_s
188  * @brief Data structure for RCON status capturing
189  * @extends TRAP_LOGGER_s
190  *********************************************************************************/
191 typedef struct CPU_RCON_s
192 {
193  union {
194  struct {
195 
196  volatile unsigned por :1;
197  volatile unsigned bor :1;
198  volatile unsigned idle :1;
199  volatile unsigned sleep :1;
200  volatile unsigned wdto :1;
201  volatile unsigned swdten:1;
202  volatile unsigned swr :1;
203  volatile unsigned extr :1;
204  volatile unsigned vregs :1;
205  volatile unsigned cm :1;
206  volatile unsigned :1;
207  volatile unsigned vregsf:1;
208  volatile unsigned :1;
209  volatile unsigned :1;
210  volatile unsigned iopuwr:1;
211  volatile unsigned trapr :1;
212 
213  }__attribute__((packed))bits;
214 
215  volatile uint16_t value;
216  };
217 
218 } CPU_RCON_t;
219 
220 /**********************************************************************************
221  * @struct TRAPLOG_STATUS_s
222  * @brief Data structure for RCON status capturing
223  * @extends TRAP_LOGGER_s
224  *********************************************************************************/
225 typedef struct TRAPLOG_STATUS_s
226 {
227  union {
228  struct {
229 
230  // Control bits
231  volatile bool cpu_reset_trigger : 1; // Bit 0: Control bit to trigger software-enforced CPU reset
232  volatile unsigned : 1; // Bit 1: (reserved)
233  volatile unsigned : 1; // Bit 2: (reserved)
234  volatile unsigned : 1; // Bit 3: (reserved)
235  volatile unsigned : 1; // Bit 4: (reserved)
236  volatile unsigned : 1; // Bit 5: (reserved)
237  volatile unsigned : 1; // Bit 6: (reserved)
238  volatile unsigned : 1; // Bit 7: (reserved)
239 
240  // Status bits
241  volatile bool sw_reset : 1; // Bit 8: Flag indicating CPU was reset by software (read only)
242  volatile unsigned : 1; // Bit 9: (reserved)
243  volatile unsigned : 1; // Bit 10: (reserved)
244  volatile unsigned : 1; // Bit 11: (reserved)
245  volatile unsigned : 1; // Bit 12: (reserved)
246  volatile unsigned : 1; // Bit 13: (reserved)
247  volatile unsigned : 1; // Bit 14: (reserved)
248  volatile unsigned : 1; // Bit 15: (reserved)
249 
250  }__attribute__((packed)) bits;
251 
252  volatile uint16_t value;
253  };
254 
256 
257 /**********************************************************************************
258  * @struct TASK_INFO_s
259  * @brief Provides information for executed task, fault event and operating mode ID of task manager
260  * @extends TRAP_LOGGER_s
261  *********************************************************************************/
262 
263 typedef struct TASK_INFO_s
264 {
265  volatile uint16_t task_id; // Task ID of last executed task
266  volatile uint16_t fault_id; // Fault ID causing a catastrophic fault event
267  volatile uint16_t op_mode; // Operating Mode ID of task manager
268 
269 } TASK_INFO_t;
270 
271 // =================================================================================================
272 //
273 // GLOBAL DATA STRUCTURE - TRAP LOGGER OBJECT
274 //
275 // =================================================================================================
276 /**********************************************************************************
277  * @struct TRAP_LOGGER_s
278  * @brief Global data structure for trap event capturing
279  *********************************************************************************/
280 typedef struct TRAP_LOGGER_s
281 {
282  volatile struct TRAPLOG_STATUS_s status;
283  volatile uint16_t reset_count;
284  volatile enum TRAP_ID_e trap_id;
285  volatile uint16_t trap_count;
286  volatile struct TRAP_FLAGS_s trap_flags;
287  volatile struct CPU_RCON_s rcon_reg;
288  volatile struct CPU_INTTREG_s inttreg;
289  volatile struct TASK_INFO_s task_capture;
290 
291 } TRAP_LOGGER_t; // Global data structure for trap event capturing
292 
295 // Global data structure used as buffer for trap monitoring
296 extern volatile __attribute__((__persistent__)) struct TRAP_LOGGER_s traplog;
297 
298 // =================================================================================================
299 //
300 // PROTOTYPES
301 //
302 // =================================================================================================
303 
304 extern volatile uint16_t drv_TrapHandler_SoftTrapsInitialize(
305  bool accumulator_a_overflow_trap_enable,
306  bool accumulator_b_overflow_trap_enable,
307  bool accumulator_catastrophic_overflow_trap_enable);
308 
309 extern void __attribute__((__interrupt__)) _HardTrapError(void);
310 extern void __attribute__((__interrupt__)) _SoftTrapError(void);
311 
312 extern void __attribute__((__interrupt__)) _OscillatorFail(void);
313 extern void __attribute__((__interrupt__)) _AddressError(void);
314 extern void __attribute__((__interrupt__)) _StackError(void);
315 extern void __attribute__((__interrupt__)) _MathError(void);
316 
321 #if (TRAP_DMA_SUPPORT == 1)
322  #if defined (_DMACError)
323  extern void __attribute__((__interrupt__)) _DMACError(void);
324  #endif
325 #endif
326 
327 
328 #if __XC16_VERSION__ < 1030
329 // Compile switch dealing with the changed support of alternate interrupt vectors between
330 // versions v.1.29 and 1.30
331 
332 extern void __attribute__((interrupt, no_auto_psv)) _AltHardTrapError(void);
333 extern void __attribute__((interrupt, no_auto_psv)) _AltSoftTrapError(void);
334 
335 extern void __attribute__((__interrupt__)) _AltOscillatorFail(void);
336 extern void __attribute__((__interrupt__)) _AltAddressError(void);
337 extern void __attribute__((__interrupt__)) _AltStackError(void);
338 extern void __attribute__((__interrupt__)) _AltMathError(void);
339 
340 #if (TRAP_DMA_SUPPORT == 1)
341  extern void __attribute__((__interrupt__)) _AltDMACError(void);
342 #endif
343 
344 #endif
345 
346 #endif
347 
volatile unsigned OVAERR
Bit #0: Accumulator A Overflow Trap Flag bit.
volatile unsigned STKERR
Bit #8: Stack Error Trap Status bit.
volatile unsigned OVBERR
Bit #1: Accumulator B Overflow Trap Flag bit.
volatile unsigned cm
Bit #9: Configuration Mismatch Flag bit.
volatile struct TRAPLOG_STATUS_s status
Status word of the Trap Logger object.
volatile unsigned ADDRERR
Bit #7: Address Error Trap Status bit.
volatile unsigned wdto
Bit #4: Watchdog Timer Time-out Flag bit.
volatile unsigned vregsf
Bit #11: Flash Voltage Regulator Standby During Sleep bit.
Trap ID for generic exception vector.
volatile bool sw_reset
volatile unsigned OSCFAIL
Bit #9: Oscillator Failure Trap Status bit.
Trap ID for alternate exception vector.
volatile struct TASK_INFO_s task_capture
Information of last task executed.
volatile unsigned COVAERR
Bit #2: Accumulator A Catastrophic Overflow Trap Flag bit.
volatile struct TRAP_LOGGER_s traplog
data structure used as buffer for trap monitoring
volatile unsigned VECNUM
Bit #0-7: Pending Interrupt Number List.
volatile unsigned por
Bit #0: Power-on Reset Flag bit.
Trap ID for primary exception vector.
volatile unsigned SGHT
Bit #14: Software Generated Hard Trap Status bit.
volatile unsigned DIV0ERR
Bit #5: Divide-by-Zero Error Status bit.
volatile unsigned ECCDBE
Bit #16: ECC Double-Bit Error Trap Status bit.
Trap ID for alternate exception vector.
Trap ID for alternate exception vector.
volatile unsigned CAN2
Bit #18: CAN2 Address Error Soft Trap Status bit.
volatile uint16_t trap_count
Counter tracking the number of occurrences.
volatile struct CPU_RCON_s rcon_reg
Captures the RESET CONTROL register.
volatile uint16_t op_mode
volatile unsigned swdten
Bit #5: Software Enable/Disable of WDT bit.
volatile unsigned VHOLD
Bit #13: Vector Number Capture Enable bit.
struct CPU_INTTREG_s CPU_INTTREG_t
volatile unsigned sleep
Bit #3: Wake-up from Sleep Flag bit.
Bit Mask to filter used bits only.
volatile unsigned extr
Bit #7: External Reset Pin (MCLR) bit.
Trap ID for alternate exception vector.
volatile uint16_t task_id
Trap ID for primary exception vector.
volatile unsigned
Bit #12: Reserved.
volatile unsigned iopuwr
Bit #14: Illegal Opcode or Uninitialized W Access Reset Flag bit.
volatile uint16_t value
volatile unsigned ILR
Bit #8-11: New Interrupt Priority Level.
volatile unsigned COVBERR
Bit #3: Accumulator B Catastrophic Overflow Trap Flag bit.
volatile unsigned DOOVR
Bit #12: DO Stack Overflow Soft Trap Status bit.
volatile uint16_t reset_count
Counter of CPU RESET events (read/write)
volatile bool cpu_reset_trigger
volatile struct TRAP_FLAGS_s trap_flags
Complete list of trap flags (showing all trap flags)
struct TRAP_LOGGER_s TRAP_LOGGER_t
volatile unsigned swr
Bit #6: Software Reset Flag (Instruction) bit.
volatile unsigned SWTRAP
Bit #10: Software Trap Status bit.
volatile unsigned CAN
Bit #17: CAN Address Error Soft Trap Status bit.
struct TASK_INFO_s TASK_INFO_t
volatile struct CPU_INTTREG_s inttreg
Interrupt Vector and Priority register capture.
struct CPU_RCON_s CPU_RCON_t
volatile unsigned APLL
Bit #13: Auxiliary PLL Loss of Lock Soft Trap Status bit.
volatile uint16_t value
volatile unsigned MATHERR
Bit #6: Math Error Status bit.
Trap ID for alternate exception vector.
Trap ID for alternate generic soft trap exception vector.
Trap ID for alternate generic hard trap exception vector.
Trap ID for primary exception vector.
Trap ID for generic hard trap exception vector.
enum TRAP_ID_e trap_id
Trap-ID of the captured incident.
Trap ID for generic soft trap exception vector.
Trap ID for primary exception vector.
volatile uint32_t value
volatile unsigned idle
Bit #2: Wake-up from Idle Flag bit.
enum TRAP_ID_e TRAP_ID_t
volatile unsigned DMACERR
Bit #15: DMA Trap Status bit.
volatile uint16_t value
volatile unsigned bor
Bit #1: Brown-out Reset Flag bit.
volatile unsigned SFTACERR
Bit #4: Shift Accumulator Error Status bit.
volatile unsigned vregs
Bit #8: Voltage Regulator Standby During Sleep bit.
volatile unsigned
Bit #10: Reserved.
volatile unsigned
Bit <19:31> (reserved)
struct TRAPLOG_STATUS_s TRAPLOG_STATUS_t
volatile unsigned trapr
Bit #15: Trap Reset Flag bit.
volatile uint16_t fault_id
Trap ID for primary exception vector.
TRAP_ID_e
Trap ID for generic exception vector.
struct TRAP_FLAGS_s TRAP_FLAGS_t
volatile unsigned NAE
Bit #11: NVM Address Error Soft Trap Status bit.