sec_core1.h

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/*
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    Subject to your compliance with these terms, you may use Microchip 
    software and any derivatives exclusively with Microchip products. 
    You are responsible for complying with 3rd party license terms  
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    software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? 
    NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS 
    SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,  
    MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 
    WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 
    INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY 
    KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF 
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    TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT 
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*/
 
#ifndef SEC_CORE1_H
#define SEC_CORE1_H
 
// Section: Included Files
 
#include <xc.h>
#include <stdint.h>
#include <stdbool.h>
#include "sec_core_types.h"
#include "sec_core_interface.h"
 
// Section: Data Type Definitions
 
 
extern const struct SEC_CORE_INTERFACE MSIInterface;
 
#define MSIInterface_Initialize SEC_CORE1_Initialize
 
#define MSIInterface_Deinitialize SEC_CORE1_Deinitialize
 
#define MSIInterface_Program SEC_CORE1_Program
 
#define MSIInterface_Strat SEC_CORE1_Strat
 
#define MSIInterface_InterruptRequestGenerate SEC_CORE1_InterruptRequestGenerate
 
#define MSIInterface_IsInterruptRequestAcknowledged SEC_CORE1_IsInterruptRequestAcknowledged
 
#define MSIInterface_InterruptRequestComplete SEC_CORE1_InterruptRequestComplete
 
#define MSIInterface_IsInterruptRequested SEC_CORE1_IsInterruptRequested
 
#define MSIInterface_InterruptRequestAcknowledge SEC_CORE1_InterruptRequestAcknowledge
 
#define MSIInterface_InterruptRequestAcknowledgeComplete SEC_CORE1_InterruptRequestAcknowledgeComplete
 
#define MSIInterface_GetResetCause SEC_CORE1_GetResetCause
 
#define MSIInterface_ResetCauseClear SEC_CORE1_ResetCauseClear
 
#define MSIInterface_SystemStatusGet SEC_CORE1_SystemStatusGet
 
#define MSIInterface_WriteFIFOEnable SEC_CORE1_WriteFIFOEnable
 
#define MSIInterface_WriteFIFODisable SEC_CORE1_WriteFIFODisable
 
#define MSIInterface_ReadFIFOEnable SEC_CORE1_ReadFIFOEnable
 
#define MSIInterface_ReadFIFODisable SEC_CORE1_ReadFIFODisable
 
#define MSIInterface_FIFORead SEC_CORE1_FIFORead
 
#define MSIInterface_FIFOWrite SEC_CORE1_FIFOWrite
 
#define MSIInterface_FIFOReadIsFull SEC_CORE1_FIFOReadIsFull
 
#define MSIInterface_FIFOReadIsEmpty SEC_CORE1_FIFOReadIsEmpty
 
#define MSIInterface_FIFOWriteIsFull SEC_CORE1_FIFOWriteIsFull
 
#define MSIInterface_FIFOWriteIsEmpty SEC_CORE1_FIFOWriteIsEmpty
 
#define MSIInterface_ProtocolWrite SEC_CORE1_ProtocolWrite
 
#define MSIInterface_ProtocolRead SEC_CORE1_ProtocolRead
 
#define MSIInterface_ProtocolIsFull SEC_CORE1_ProtocolIsFull
 
#define MSIInterface_ProtocolIsEmpty SEC_CORE1_ProtocolIsEmpty
 
 
// Section: SEC_CORE1 Module APIs
 
void SEC_CORE1_Initialize(void);
 
void SEC_CORE1_Deinitialize(void);
 
void SEC_CORE1_Start(void);
 
void SEC_CORE1_Program(void);
 
void SEC_CORE1_InterruptRequestGenerate(void);
 
bool SEC_CORE1_IsInterruptRequestAcknowledged(void);    
 
void SEC_CORE1_InterruptRequestComplete(void);    
 
bool SEC_CORE1_IsInterruptRequested(void);    
 
void SEC_CORE1_InterruptRequestAcknowledge(void);    
 
void SEC_CORE1_InterruptRequestAcknowledgeComplete(void);
 
enum SEC_CORE_RESET_CAUSE SEC_CORE1_GetResetCause(void);    
 
void SEC_CORE1_ResetCauseClear(enum SEC_CORE_RESET_CAUSE resetCause);    
 
enum SEC_CORE_SYSTEM_STATUS SEC_CORE1_SystemStatusGet(void);    
 
uint16_t SEC_CORE1_FIFORead(uint16_t *pData, uint16_t wordCount);    
 
uint16_t SEC_CORE1_FIFOWrite(uint16_t *pData, uint16_t wordCount);
 
inline static void SEC_CORE1_WriteFIFOEnable(void)
{
    MSI1FIFOCSbits.WFEN = 1U;
}
 
inline static void SEC_CORE1_WriteFIFODisable(void)
{
    MSI1FIFOCSbits.WFEN = 0U;
}
 
inline static void SEC_CORE1_ReadFIFOEnable(void)
{
    MSI1FIFOCSbits.RFEN = 1U;
}
 
inline static void SEC_CORE1_ReadFIFODisable(void)
{
    MSI1FIFOCSbits.RFEN = 0U;
}
 
inline static bool SEC_CORE1_FIFOReadIsFull(void)
{
    return(MSI1FIFOCSbits.RFFULL);
}
 
inline static bool SEC_CORE1_FIFOReadIsEmpty(void)
{
    return(MSI1FIFOCSbits.RFEMPTY);
}
 
inline static bool SEC_CORE1_FIFOWriteIsFull(void)
{
    return(MSI1FIFOCSbits.WFFULL);
}
 
inline static bool SEC_CORE1_FIFOWriteIsEmpty(void)
{
    return(MSI1FIFOCSbits.WFEMPTY);
}
 
bool SEC_CORE1_ProtocolWrite(enum SEC_CORE_PROTOCOLS protocolName, uint16_t *pData);
 
bool SEC_CORE1_ProtocolRead(enum SEC_CORE_PROTOCOLS protocolName, uint16_t *pData);
 
inline static bool SEC_CORE1_ProtocolIsFull(enum SEC_CORE_PROTOCOLS protocolName)
{
    bool status = false;
    switch(protocolName)
    {
        case MSI1_ProtocolA:
            status =  MSI1MBXSbits.DTRDYA;
            break;
        case MSI1_ProtocolB:
            status =  MSI1MBXSbits.DTRDYB;
            break;
        default:
            break;   
    }  
    return status;   
}
 
inline static bool SEC_CORE1_ProtocolIsEmpty(enum SEC_CORE_PROTOCOLS protocolName)
{
    bool status = false;
    switch(protocolName)
    {
        case MSI1_ProtocolA:
            status =  !MSI1MBXSbits.DTRDYA;
            break;
        case MSI1_ProtocolB:
            status =  !MSI1MBXSbits.DTRDYB;
            break;
        default:
            break;   
    }  
    return status; 
}
 
 
 
#endif //SEC_CORE1_H