Peripheral Register Abstraction Layer (PRAL) Library

Collaboration diagram for Peripheral Register Abstraction Layer (PRAL) Library:

Modules
	Capture Compare Module (SCCP/MCCP)
	Capture Compare Peripheral Module Special Function Register Abstraction Driver.
	Digital-To-Analog Converter Module (DAC)
	Digital-To-Analog Converter Peripheral Module Special Function Register Abstraction Driver.
	Digital Signal Processor Converter Module (DSP)
	Digital Signal Processor Special Function Register Abstraction Driver.
	General Purpose Input/Output (GPIO)
	General Purpose Input/Output Special Function Register Abstraction Driver.
	Operational Amplifier Module (AMP)
	Operational Amplifier Peripheral Module Special Function Register Abstraction Driver.
	Oscillator Module (OSC)
	Oscillator Module Special Function Register Abstraction Driver.
	Peripheral Pin Select Module (PPS)
	Peripheral Pin Select Module Special Function Register Abstraction Driver.
	High-Speed PWM Module (HSPWM)
	High-Speed PWM Module Special Function Register Abstraction Driver.

Detailed Description

The Peripheral Register Abstraction Layer (PRAL) Library is used to provide abstracted (virtual) versions of peripheral specific Special Function Register (SFR) sets of specific peripherals.

For each supported peripheral type a Peripheral Module Special Function Register Abstraction Driver provides a specific set of standardized functions and properties allowing applications to access and control specific instances of this peripheral using indirect addressing of registers.

This abstraction allows to create and apply templates of peripheral configurations, which can be written to specific instances of a peripheral at runtime. Further, these PRAL drivers provide a mechanism to write generic code utilizing peripheral functions without direct association to specific peripheral instances. This mechanism is vital to support easy code migration across devices and are the basis of the chip resource management of device drivers.