Digital Power Starter Kit 3 Firmware
dsPIC33C Boost Converter Voltage Mode Control Example
rtos_dsp.c
1 /*
2  * File: init_dsp.c
3  * Author: M91406
4  *
5  * Created on October 16, 2018, 12:00 PM
6  */
7 
8 
9 #include <xc.h> // include processor files - each processor file is guarded.
10 #include <stdint.h> // include standard integer data types
11 #include <stdbool.h> // include standard boolean data types
12 #include <stddef.h> // include standard definition data types
13 
14 #include "common/p33c_pral/xc16_pral.h" // include common peripheral abstraction layer driver header file
15 
16 /***********************************************************************************
17  * @fn uint16_t osDsp_Initialize(void)
18  * @ingroup dsp-initialization
19  * @brief Digital Signal Processor initialization
20  * @return unsigned integer
21  * 0=failure
22  * 1=success
23  *
24  * @details
25  * This routine initializes the default configuration of the
26  * DSP core for performing SMPS control loop libraries.
27  * If any other section of the firmware needs to use the DSP
28  * with different settings, this code module would have to
29  * make sure the core configuration is reset to these defaults
30  * when the SMPS control library is executed.
31  *
32  * @note:
33  * The configuration of the control library allows to add its own
34  * core configuration save & restore cycle in the control code.
35  * Please enable this function in the control loop configuration
36  * if conflicts between different DSP configurations cannot be
37  * resolved differently within the firmware.
38  * This routine initializes the default configuration of the
39  * DSP core for performing SMPS control loop libraries.
40  * If any other section of the firmware needs to use the DSP
41  * with different settings, this code module would have to
42  * make sure the core configuration is reset to these defaults
43  * when the SMPS control library is executed.
44  *
45  * The configuration of the control library allows to add its own
46  * core configuration save & restore cycle in the control code.
47  * Please enable this function in the control loop configuration
48  * if conflicts between different DSP configurations cannot be
49  * resolved differently within the firmware.
50  *
51  **********************************************************************************/
52 volatile uint16_t osDsp_Initialize(void) {
53 
54  volatile struct P33C_DSP_CONFIG_s* dsp;
55 
56  dsp = p33c_DspConfig_GetHandle();
57 
58  dsp->CORCON.bits.ACCSAT = CORCON_ACCSAT_131; // Accumulator Saturation Mode Selection: 9.31 saturation (super saturation)
59  dsp->CORCON.bits.IF = CORCON_IF_FRACTIONAL; // Integer or Fractional Multiplier Mode Selection: Fractional mode is enabled for DSP multiply
60  dsp->CORCON.bits.RND = CORCON_RND_UNBIASED; // Rounding Mode Selection: Unbiased (convergent) rounding is enabled
61  dsp->CORCON.bits.SATA = CORCON_SATA_ON; // ACCA Saturation Enable: Accumulator A saturation is enabled
62  dsp->CORCON.bits.SATB = CORCON_SATB_ON; // ACCB Saturation Enable: Accumulator B saturation is enabled
63  dsp->CORCON.bits.SATDW = CORCON_SATDW_OFF; // Data Space Write from DSP Engine Saturation Enable: Data Space write saturation is enabled
64  dsp->CORCON.bits.US = CORCON_US_SIGNED; // DSP Multiply Unsigned/Signed Control: DSP engine multiplies are signed
65  dsp->CORCON.bits.VAR = CORCON_VAR_FIXED; // Variable Exception Processing Latency Control: Fixed exception processing is enabled
66 
67 // dsp->CORCON.bits.DL = CORCON_DL_0; // (read only)
68 // dsp->CORCON.bits.EDT = CORCON_EDT_RUN; // control bit => do not set during configuration
69 // dsp->CORCON.bits.SFA = CORCON_SFA_ACTIVE; // (read only)
70 // dsp->CORCON.bits.IPL3 = CORCON_IPL3_STAT_LT7; // (read only)
71 
72  Nop();
73  Nop();
74  Nop();
75 
76  return(1);
77 }
78 
struct tagCORCONBITS bits
Definition: p33c_dsp.h:169
union P33C_DSP_CONFIG_s::@122 CORCON